Sakthieswaran P. — Software Engineer
• Around 11 years experience in Digital ASIC verification • Strong background in processor based SOC Verification. • Good exposure to ARM cores, DSP cores & Processor subsystems. • Involved in Full Chip Verification for more than 4 Tape outs. Expertise Highlights ---------------------------- • Chip infrastructure like clocking and Reset scheme verification • Low power verification methodologies using CPF/UPF • Processor env setup, boot & familiarity to debug infrastructure • Familiar with power estimation techniques • Familiar to security architectures • Exposure to AMBA protocols • ARM subsystem integration verification • Digital Signal Processor(DSP) core, L1 cache design & verification
Stackforce AI infers this person is a Digital ASIC Verification Expert with a focus on SoC and processor-based architectures.
Location: Bengaluru, Karnataka, India
Experience: 26 yrs 7 mos
Career Highlights
- Over 11 years in Digital ASIC verification.
- Expertise in processor-based SoC verification.
- Involved in full chip verification for multiple tape outs.
Work Experience
Intel Corporation
Principal Engineer (2 yrs 6 mos)
Lead Verification Engr. (10 yrs 8 mos)
Qualcomm
Staff Engineer (2 yrs 7 mos)
ST Microelectronics
Staff Engineer (3 yrs 7 mos)
ST Ericsson
Tech Lead (3 mos)
NXP
Tech Lead (2 yrs 11 mos)
Design Engr (4 yrs 10 mos)
Tata Steel
Graduate Trainee (2 yrs)
Education
M.Tech at Indian Institute of Technology, Madras
B.E.(Hons) at Birla Institute of Technology and Science, Pilani