Ganesna Venkataramakrishna

Software Engineer

Bengaluru, Karnataka, India13 yrs experience
Highly Stable

Key Highlights

  • 8 years of experience in Physical Design.
  • Expertise in VLSI and RTL Design.
  • Proficient in multiple EDA tools and programming languages.
Stackforce AI infers this person is a VLSI expert with strong capabilities in Physical Design and RTL development.

Contact

LinkedIn

Skills

Core Skills

Physical Design

Other Skills

synthesisphysical convergenceStatic Timing AnalysisNoise ReductionTCLPerlSynopsys toolsVHDLC++ Language

About

Seeking a career in VLSI industry Have experience in Physical Design (8 years) Areas of Interest: Physical Design, Frontend RTL Design Technical Skills: Languages: TCL, PERL, VHDL, C and Basics of C++. EDA Tools: Synopsys ICC and DC, Cadence Schematic Editor and Layout Editor, Xilinx ISE, Matlab

Experience

13 yrs
Total Experience
13 yrs
Average Tenure
13 yrs
Current Experience

Intel corporation

3 roles

Senior Physical Design Engineer

May 2016 – Present · 10 yrs 1 mo

Design Automation Engineer

May 2014 – Aug 2023 · 9 yrs 3 mos

Graduate Intern

May 2013 – Apr 2014 · 11 mos

  • i am part of back end team working on next generation server team based on 14nm technology node. i was involved in synthesis to physical convergence.
synthesisphysical convergencePhysical Design

Education

National Institute of Technology Calicut

Master of Technology (M.Tech.) — electronic design and technology

Jan 2012 – Jan 2014

sri vishnu institute of technology, bhimavaram

Bachelor of Technology (B.Tech.)

Jan 2008 – Jan 2012

Sri Chaitanya junior college, bhimavaram

intemediate — MPC

Jan 2006 – Jan 2008

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