Arpit Singh — Software Engineer
Strong technical experience in semiconductor domain (Physical Design / PnR, Synthesis, Custom Layout). Responsibilities includes: · Synthesis, Floorplannig, Power planning, Placement, Clock Tree Synthesis, Routing, Sign-off Extraction, Sign-off verification (LVS, DRC, Conformal LEC, FORAMLITY, DRV Fixing, Noise Fixing, Antenna Fixing, etc), Functional ECO’s.
Stackforce AI infers this person is a semiconductor design engineer with extensive experience in VLSI and physical design.
Location: Bengaluru, Karnataka, India
Experience: 22 yrs 3 mos
Skills
- Physical Design
- Vlsi
Career Highlights
- Expertise in Physical Design and VLSI methodologies.
- Proven track record in complex SoC design.
- Strong background in semiconductor technologies.
Work Experience
Intel Technology India Pvt. Ltd.
SoC Design Engineer (4 yrs 4 mos)
Infineon Technologies
Senior Staff Engineer (3 yrs 3 mos)
Intel Technology India Private Ltd.
Senior Design Engineer (2 yrs 5 mos)
STMicroelectronics
Staff Engineer (5 yrs)
IBM India
R & D Engineer (2 yrs 8 mos)
Wipro Technologies
Project Engineer (2 yrs 2 mos)
Satyam
Software Engineer (2 yrs 5 mos)
Education
PGCBM at XLRI Jamshedpur
B.E. at Doctor Bhim Rao Ambedkar University
AISSCE at Nehru Public School Shastri Nagar Ghaziabad U.P.
High School at Gyan Peethika Jagdishpur Ballia Uttar Pradesh