Dishanth K

Software Engineer

Bengaluru, Karnataka, India6 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expertise in VLSI ASIC physical design.
  • Experience with cutting-edge 3 nm and 10 nm projects.
  • Strong background in synthesis and physical implementation.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC physical design.

Contact

Skills

Core Skills

Application-specific Integrated Circuits (asic)Physical Design

Other Skills

Block level synthesisIP level STASynthesisPhysical implementationPhysical verificationScriptingPlace & RouteSynopsys ICC2Team LeadershipTeam ManagementTeam MotivationClock Tree SynthesisStatic Timing AnalysisLogic SynthesisCMOS

About

Hey Visitor!! Firstly, thanks for taking out time in knowing about me.๐Ÿ˜… The responsibility on my shoulders has increased as you have come here with some expectations about my profile. I hope I shall not disappoint you with my skillset.๐Ÿ˜ Okay.. Lemme start with my professional introduction. By now you might have known my name๐Ÿ˜œ still.. Out of habit.. This is Dishanth, an engineer belonging to the community of "engineering the things of tomorrow" individuals with expertise in VLSI ASIC physical design. I started my career way back in 2019 (Hey!! That's 6 years already ๐Ÿ˜ƒ) at Altran technologies, Coimbatore (present day Capgemini) I was fortunate that I got opportunity to kick start the career with 10 nm project where my responsibilities were mainly but not limited to synthesis, physical implementation, physical verification and scripting. Now, I work in the modem team at MediaTek, Bengaluru where I own tasks on block level synthesis and IP level STA. Wait, did I forget to mention that I work on 3 nm projects now? Yeah.. So here is the candidate with versatile profile and expertise in lower technology node projects. I can talk more about my skills in detail if you wish to invest time in knowing more about me (why not an interview opportunity๐Ÿ˜…) Coming to the personal information... I'm raised in Bengaluru city. A person with qualities of a human and believer of humanity!! Hobby singer, avid reader, weekend Gardner and a traveller too ๐Ÿ˜Š If not to explore my engineering skills, atleast can consider staying in touch by sending connection request if not in your contact list already ๐Ÿ™‚ That's it for the day.. Stay positive and keep rocking in everything that you do.. -Signing off Dishanth K

Experience

6 yrs 11 mos
Total Experience
2 yrs 3 mos
Average Tenure
3 yrs 10 mos
Current Experience

Mediatek

Senior Engineer

Jul 2022 โ€“ Present ยท 3 yrs 10 mos ยท Bengaluru, Karnataka, India

Block level synthesisIP level STAApplication-Specific Integrated Circuits (ASIC)Physical Design

Sondrel ltd

2 roles

Senior Design Engineer I

Promoted

Apr 2022 โ€“ Jul 2022 ยท 3 mos ยท Hyderabad, Telangana, India

Physical Design Engineer III

Jul 2021 โ€“ Apr 2022 ยท 9 mos ยท Hyderabad, Telangana, India

Altran

Physical Design Engineer

Mar 2019 โ€“ Jul 2021 ยท 2 yrs 4 mos ยท Coimbatore, Tamil Nadu, India

SynthesisPhysical implementationPhysical verificationScriptingApplication-Specific Integrated Circuits (ASIC)Physical Design

Education

RV-VLSI and Embedded Systems Design Center

Advanced diploma in ASIC Physical Design โ€” VLSI

Jan 2018 โ€“ Jan 2019

Global Academy of Technology, BANGALORE

Bachelor of Engineering - BE

Jan 2014 โ€“ Jan 2018

Vidya vardhaka pre-university college

PUC โ€” PCMB

Jan 2012 โ€“ Jan 2014

Stackforce found 100+ more professionals with Application-specific Integrated Circuits (asic) & Physical Design

Explore similar profiles based on matching skills and experience