Maheswara Reddy Kayala

Associate Partner

Bengaluru, Karnataka, India5 yrs 10 mos experience
Highly Stable

Key Highlights

  • Experienced in Physical Design and ASIC development.
  • Proven leadership in engineering roles across multiple companies.
  • Strong technical skills in VLSI and related tools.
Stackforce AI infers this person is a VLSI and ASIC design expert with extensive experience in physical design engineering.

Contact

LinkedIn

Skills

Other Skills

Physical DesignstaPNRApplication-Specific Integrated Circuits (ASIC)Very-Large-Scale Integration (VLSI)Microsoft OfficeMicrosoft WordPerlIR analysis

Experience

5 yrs 10 mos
Total Experience
3 yrs 11 mos
Average Tenure
1 yr 11 mos
Current Experience

3 yrs 3 mos

Cerium Systems

– Present

Sierraedge ai

2 roles

Associate Director

Promoted

May 2025 – Present · 11 mos · Bengaluru, Karnataka, India

Sr Lead physical design engineer

May 2024 – May 2025 · 1 yr · Bengaluru, Karnataka, India

Adept chip services pvt ltd

2 roles

Lead physical design engineer

Feb 2022 – May 2024 · 2 yrs 3 mos

Senior Physical Design Engineer

Jun 2020 – Feb 2022 · 1 yr 8 mos

Qualcomm

Engineer -3 PD

Dec 2021 – May 2024 · 2 yrs 5 mos · Bengaluru, Karnataka, India · On-site

  • worked as contract employee from quest global

Amd

Senior Physical Design Engineer

Dec 2020 – Jan 2022 · 1 yr 1 mo · Bengaluru, Karnataka, India

  • worked as contract employee from Adeptchips PVT LTD

Synaptics incorporated

Lead physical design engineer

Aug 2020 – Sep 2021 · 1 yr 1 mo · Hyderabad, Telangana, India · Remote

  • worked as contract employee from Adeptchips

Education

Sree

Bachelor of Technology - BTech

May 2016 – Present

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