S

Sukanya Palampalli

Product Engineer

Bengaluru, Karnataka, India6 yrs 9 mos experience

Highly Stable

Key Highlights

Experienced in CPU verification engineering.
Strong background in design verification testing.
Proficient in multiple programming languages and methodologies.

Stackforce AI infers this person is a Hardware Verification Engineer with expertise in semiconductor design and verification.

Contact

Skills

Core Skills

ProcessorsDesign Verification Testing

Other Skills

Test PlanningObject-Oriented Programming (OOP)Electronic HardwareC++LinuxPerformance VerificationComputer SimulationsDigital ElectronicsVerilogSystemVerilogVery-Large-Scale Integration (VLSI)MavenEDAUniversal Verification Methodology (UVM)System verilog assertions

About

Working in AMD as CPU verification engineer.

Experience

6 yrs 9 mos

Total Experience

2 yrs

Average Tenure

9 mos

Current Experience

Ibm

Hardware Verification Engineer

Aug 2025 – Present · 9 mos · Bengaluru

Amd

2 roles

Senior Silicon design engineer

Promoted

Apr 2024 – Sep 2025 · 1 yr 5 mos · Hybrid

Silicon Design engineer 2

Mar 2022 – Mar 2024 · 2 yrs · Hybrid

Test PlanningProcessorsDesign Verification Testing

Insemi technology services pvt. ltd.

Associate verification engineer

Nov 2019 – Mar 2022 · 2 yrs 4 mos · Bengaluru, Karnataka, India

Trainee

Trainee

Jun 2019 – Oct 2019 · 4 mos · Bengaluru, Karnataka, India

Object-Oriented Programming (OOP)

Education

Mekapati Rajamohan Reddy Inst. of Tech & Science, Udayagiri

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 2015 – Jan 2019

Geethanjali junior college, Kadapa

Bachelor of Engineering - BE

Jan 2015 – Jan 2019

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