Syed Naseef

CEO

Bengaluru, Karnataka, India16 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Proven excellence in Front end Design.
  • Expertise in ASIC and Digital Design.
  • Cross Functional Team Leader.
Stackforce AI infers this person is a VLSI and ASIC design expert with strong leadership in embedded systems.

Contact

LinkedIn

Skills

Core Skills

AsicDigital DesignEmbedded SystemsVlsiDesign Engineering

Other Skills

Power OptimizationPerformance AnalysisUFS Device ControllerNVMeSCSIe Flash ControllerUniPro IPDesign SpecificationUniPro RXCSI IP DevelopmentWireless LAN ASICFPGA PrototypingPerl ScriptingVerilogDebuggingC

About

Proven excellence in Front end Design with expertise in Design Specification, Microarchitecture, RTL Implementation, Synthesis and Validation. Experienced in implementing complex design & enhancements while managing the entire product life cycle successfully from requirement analysis, design, implementation and testing. Cross Functional Team Leader.

Experience

16 yrs 10 mos
Total Experience
4 yrs 3 mos
Average Tenure
10 yrs 9 mos
Current Experience

Qualcomm

Senior Staff Manager

Aug 2015 – Present · 10 yrs 9 mos · Bangalore · On-site

  • ASIC/IP Development.
  • Customer Requirement to Delivery.
  • Power, Performance and Area.
ASICPower OptimizationPerformance AnalysisDigital Design

Samsung r&d institute, bangalore

Technical Lead

Aug 2012 – Aug 2015 · 3 yrs · Bengaluru Area, India

  • UFS Device Controller and UFS Host Controller.
  • NVMe/SCSIe Flash Controller.
  • UniPro IP.
UFS Device ControllerNVMeSCSIe Flash ControllerUniPro IPDigital DesignEmbedded Systems

L&t infotech

Design Engineer

Mar 2010 – Aug 2012 · 2 yrs 5 mos · Bengaluru Area, India

  • Design Specification Development for Unipro.
  • Implementation of UniPro RX.
  • Development of CSI(Camera Serial Interface) IP.
Design SpecificationUniPro RXCSI IP DevelopmentVLSIDesign Engineering

Broadcom

Internship

Jul 2009 – Jun 2010 · 11 mos · Bengaluru Area, India

  • Prototyping of Wireless LAN ASIC using multiple FPGAs for Validation and software development.
  • Automation of FPGA flow using Perl scripting.
Wireless LAN ASICFPGA PrototypingPerl Scripting

Education

RV College Of Engineering

Master of Technology (M.Tech.) — VLSI Design

Jan 2007 – Jan 2009

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