H

Harshavardhan K.

Software Engineer

India15 yrs 5 mos experience
Highly Stable

Key Highlights

  • Seventeen years of experience in ASIC design verification.
  • Expertise in low power verification and functional verification.
  • Technical leadership in hardware design verification projects.
Stackforce AI infers this person is a Semiconductor and Electronics Verification Expert with extensive experience in ASIC and FPGA design.

Contact

Skills

Core Skills

VerificationFunctional VerificationAsic VerificationFpga Verification

Other Skills

SystemVerilogPerlLow Power VerificationVerilogDigital DesignWireless CommunicationModelSimIntegrated Circuit DesignDigital Signal ProcessorsFPGASimulationsMatlabSoCWirelessEmbedded Systems

About

About seventeen years overall experience in Low Power Verification, Functional Hardware Design Verification, Reference Software Modeling and SoC System Integration of IPs and Accelerators for Memory Subsystems, Hardware Security, Network-on-Chip, Augmented Reality, Image & Video Codecs and Consumer Electronics applications. Technical leadership and team/project management experience in the Hardware Design Verification Domain - Hiring, training, guiding, and driving engineering teams right from project initiation to delivering successful tapeouts. Research experience in simulation of Nano-electronics & Systems (using nano-materials) towards their applications in the fields of Wireless Communications and Sensors. M.Sc. (TU Munich, Germany) B.Tech. (JNTU Hyderabad, India)

Experience

15 yrs 5 mos
Total Experience
2 yrs 8 mos
Average Tenure
--
Current Experience

Nvidia

Senior ASIC Engineer

Mar 2016Jul 2024 · 8 yrs 4 mos · Bengaluru, Karnataka, India

Innovaide inc.

Verification Practice Lead & Biz Dev

Feb 2014Mar 2016 · 2 yrs 1 mo · Greater Bengaluru Area

  • Consultant at NetSpeed Systems, Bangalore, India May 2014 - Aug 2015
  • ◦ Unit-level and NoC-level Verification of APB, AXI and AXI-Lite composite bridges using SV & Perl
  • ◦ Common Power Format based Low Power Verification of NoC Interconnect IP for SoCs.
  • Consultant at Aura Semiconductor Private Ltd, Bangalore, India February 2014 - April 2014
  • ◦ Digital-top-level and Chip-top-level Functionality Verification of a mixed-signal audio chip
  • using conventional Verilog-based testbench environment
  • ◦ Develop model to verify register path connectivity from digital interface to analog leaf-level nodes.
SystemVerilogPerlLow Power VerificationVerilogVerificationFunctional Verification

Metaio gmbh (acquired by apple inc- may 2015)

Hardware Developer (Senior)

Mar 2012Aug 2013 · 1 yr 5 mos · Greater Munich Metropolitan Area

  • Verification and System Integration of world's first Augmented Reality Hardware Accelerator Engine.

Technische universität münchen

Graduate Research Assistant and Master's Thesis Student

Dec 2011Oct 2012 · 10 mos · Downtown Campus, Munich, Germany

  • Institute for Integrated Systems (LIS): HW/SW Codesign Laboratory Tutor- Summer Semester 2012
  • Institute for Nanoelectronics (NANO): USB-I2C interfaced Stepper Motors set-up for Near-Field EMI measurements; Oscilloscope- Instrument Control and Data Acquisition set-up using MATLAB.
  • Master's Thesis Topic: Modeling of Carbon Nanotube Films Antennas

Texas instruments

Summer Research Intern (MSP430 EUR Design)

Aug 2011Nov 2011 · 3 mos · Freising, Munich, Germany

  • Advanced Functional Verification MSP43x - using Specman/e Hardware Verification Language.

Tata elxsi

Senior Engineer - Semicon & Systems

Jun 2007Jul 2010 · 3 yrs 1 mo · Bengaluru, Karnataka, India

  • ASIC/FPGA Verification:
  • DSP Multimedia and Wireless Communication Systems
  • 1. ASIC/FPGA Multi-million gate Design Verification
  • 2. Advanced Digital Design
  • 3. JPEG2000
  • 4. H.264
  • 5. Wireless HDMI
  • 6. RS Encoder Decoder
  • Interface protocols
  • 1. DMAC interface
  • 2. OPB, AHB interface
ASIC VerificationFPGA VerificationDigital DesignWireless Communication

Education

Technical University of Munich

M.Sc. — Communications Electronics

Jawaharlal Nehru Technological University

B.Tech — Electronics and Communication Engineering

University of Toronto

Learn To Program in Python

University of Maryland

The 1st Step in Entrepreneurship

Deutsche Akademie, Munich, Germany

Beginner Level A1 — German

Alliance Francaise, Bangalore, India

DELF A1 — French

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