Yash Shah

Software Engineer

Bengaluru, Karnataka, India8 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in emulation and prototyping for AMD processors.
Strong background in Verilog and Python programming.
Proven track record in performance optimization and debugging.

Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in emulation and prototyping.

Contact

Skills

Core Skills

EmulationPrototypingSoc ValidationTest AutomationEmbedded SystemsWeb Development

Other Skills

VerilogPythonFPGADebuggingPerformance OptimizationEDA ToolsEthernet TestingReset TestingPerformance ValidationData AnalysisArduinoObject Oriented ProgrammingcMatlabImage Processing

About

AMD benefits from expertise in emulation and prototyping platforms, with a focus on optimizing compile and run-time performance for Ryzen , MI and EPYC processors. Contributed to the enablement of debug features on Protium-X2, ensuring its production readiness, and advanced abstracted emulation infrastructure for seamless multi-EDA vendor compatibility. Master's degree in Electrical and Electronics Engineering from San Jose State University underpins a skill set in Verilog and Python programming.

Experience

8 yrs 3 mos

Total Experience

1 yr 6 mos

Average Tenure

4 yrs 3 mos

Current Experience

Amd

MTS Emulation/Prototype Engineer

Mar 2022 – Present · 4 yrs 2 mos · Bengaluru, Karnataka, India

Responsible to bring-up Ryzen desktop and EPYC server processor's various SoCs/IPs model on Protium-X2 - which is FPGA based prototyping platform.
Responsibility extends to work on Compile time & Run-time Performance Optimizations for Emulation & Prototyping platforms.
Involved in enablement of debug features for Protium-X2 and make it production worthy.
Work on develop & enhance abstracted emulation infrastructure to compile models for various EDA vendor with single compile flow.

VerilogPythonFPGAEmulationPrototypingDebugging+1

Marvell semiconductor

Hardware and Silicon Validation Engineer

May 2020 – Feb 2022 · 1 yr 9 mos · Marlborough, Massachusetts, United States

Plan and execute various ethernet test for 1G to 100G with fiber, copper transceivers and cables against external Ethernet switches on Octeon10 SoC.
Responsible to validate reset tests on different processors such as SCP, MCP, ECP and AP cores. Check performances of running clock for different processor with using Oscilloscope.
Involve as a frontline validation engineer to interact with customers and solve their issues related to ethernet IP.
Validate various functionalities of SoC such as PCIE linkup, GPIO.
Contribution in development of python scripts for reset stress testing, parsing the log files, setup multiple ethernet switches with desirable speed/mode/ports on a single run. Use Gerrit as code collaboration tool.
Responsible for silicon and board bring up activities.

Ethernet TestingPythonSoC ValidationReset TestingPerformance Validation

Intel corporation

System Validation Intern

Jun 2019 – May 2020 · 11 mos · San Jose , California

Create tests with integrating IPs of Memory , Ethernet , PCIE and Sensors. Execute on platform using automation tool.
Debugging failed tests and test environment . Gather test data & analyze failing node of test. File a descriptive sighting to help design team and lab team to resolve issues in scripts and hardware platform issues.

Test AutomationDebuggingData Analysis

San jose state university

Teaching Assistant

Jan 2019 – May 2020 · 1 yr 4 mos · United States

Working as a TA for Course -EE128 (Semiconductor physics ).
Teaching the concepts of semiconductor, transistor and gate level knowledge to more than 60 students.

Vis-con automation

Application Engineer

Mar 2018 – Aug 2018 · 5 mos · Greater Ahmedabad Area

Worked on designing Home Automation system, gained knowledge of interfacing FPGA, Arduino and GSM.
Used Verilog HDL to design ‘Smart Safe locker system’ which open remotely using GSM. Implemented on FPGA.

FPGAArduinoVerilogEmbedded Systems

Tata consultancy services

Assistant System Engineer

Aug 2017 – Feb 2018 · 6 mos · Pune/Pimpri-Chinchwad Area

In training, created a web page using Object Oriented Programming language and HTML.
Designed an ‘Automated moving Arm’, moved in 3 Dimension. Created Verilog code and implemented on FPGA for communication between MPU 9250 motion sensor and moving Arm.

Web DevelopmentVerilogObject Oriented Programming