Sudha Biradar — Software Engineer
Have 5+ years of experience in the Physical Verification of SOC partitions and involved in more than 10 projects having hands-on experience in DRC verification, subsystem-level Layout verification, and Top metal SOC integration. I have worked on multiple technology nodes such as 10nm, 10++nm, N3, 3nm, and 20A and worked on industry-standard icc1/icc2/rtlfp/fusion compiler tools. Have knowledge of scripting in languages such as TCL/sch.
Stackforce AI infers this person is a Physical Design Engineer with expertise in semiconductor verification and mobile application development.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 9 mos
Skills
- Physical Verification
- System On A Chip (soc)
- Android Development
- Api Development
Career Highlights
- Over 5 years of experience in Physical Verification.
- Hands-on expertise in DRC and SOC integration.
- Worked on advanced technology nodes including 3nm.
Work Experience
Intel Corporation
Physical Design Engineer (8 yrs 4 mos)
Y Media Labs
Associate Software Engineer (1 yr 5 mos)
Education
Bachelor of Engineering - BE at Shri Dharmastala Manjunatheswara College of Engineering and Technolog
Bachelor of Science - BS at Tungal College of Science and Technology, Jamakhandi