riddish patel — Software Engineer
Stackforce AI infers this person is a Semiconductor Design Verification Engineer with expertise in verification methodologies.
Location: Bengaluru, Karnataka, India
Experience: 8 yrs
Skills
- Systemverilog
- Universal Verification Methodology (uvm)
Career Highlights
- Experienced in SoC design verification at Intel.
- Proficient in SystemVerilog and UVM methodologies.
- Strong foundation in electronics and communications engineering.
Work Experience
Intel Corporation
SoC Design Engineer (4 yrs 3 mos)
Cerium Systems
Project Engineer (3 yrs 9 mos)
Education
B.E at Shri Ramdeobaba College of Engineering and Management
