Anil P.

Product Engineer

Noida, Uttar Pradesh, India8 yrs experience
Highly Stable

Key Highlights

  • Expert in RTL design and Verilog coding.
  • Proficient in CDC methodologies and tools.
  • Experience with leading semiconductor companies.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL and SoC design.

Contact

anilkumarvivek@yahoo.co.inLinkedIn

Skills

Core Skills

Soc DesignCdcRtl Design

Other Skills

Fronted toolRTL CodingLintFishtailCaliberPerl AutomationField-Programmable Gate Arrays (FPGA)Analog Circuit DesignCircuit DesignDigital ElectronicsApplication-Specific Integrated Circuits (ASIC)verilogMicrosoft WordSynopsys toolsCadence

About

Experience on RTL design ,Verilog code ,Sglint, CDC/RDC part ,lec ( different part like Fev_Lite ,SIM2SYN ,RTL to RTL) and also Fishtail tool for constraints promotion. I had work on different tiles during projects with Intel on different tools like SGCDC,FC,LEC, Calibre

Experience

8 yrs
Total Experience
2 yrs 2 mos
Average Tenure
1 yr 6 mos
Current Experience

Cadence design systems

Sr.Product validation Engineer

Nov 2024 – Present · 1 yr 6 mos · Noida, Uttar Pradesh, India · Hybrid

Microchip technology inc.

SoC Design Engineer

Dec 2023 – Nov 2024 · 11 mos · Banglore · On-site

Intel corporation

SoC Design Engineer

Jan 2020 – Dec 2023 · 3 yrs 11 mos · Bengaluru, Karnataka, India · Hybrid

  • client Intel
Fronted toolCDCSoC Design

Synopsys inc

RTL design

May 2018 – Jan 2020 · 1 yr 8 mos

  • client synopsys
CDCRTL CodingRTL Design

Education

Vellore Institute of Technology

M.TECH — VLSI

Jun 2016 – Jun 2018

Gov college punjab

B.Tech — Electronics and Communications Engineering

Jan 2011 – Jan 2015

Raj Narain College (R.N. College), Hajipur

Higher secondary — SCIENCE

Jan 2007 – Jan 2009

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