Saiteja Rayala — Software Engineer
Soc Design Verification Engineer with 3+ years of experience at Intel in Power Management Domain of Next Gen Xeon SoCs at Simulation and Emulation Environments and IP/SS verification of NOC. Proficient in developing test cases and Industry standard languages such as Verilog, System verilog and UVM. Hands on experience in industry standard debug tools.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in Power Management and SoC design.
Location: Khammam, Telangana, India
Experience: 4 yrs 9 mos
Skills
- Functional Verification
- Ip Subsystem Verification
Career Highlights
- 3+ years of experience in SoC Design Verification.
- Proficient in Verilog, SystemVerilog, and UVM.
- Hands-on experience with industry-standard debug tools.
Work Experience
Qualcomm
Senior Engineer (1 yr 1 mo)
Intel Corporation
SoC Design Verification Engineer (2 yrs 9 mos)
Graduate Technical Intern (11 mos)
Cognizant
Program Analyst trainee (10 mos)
Education
Master of Technology - MTech at National Institute of Technology Calicut
Bachelor of Engineering at Vasavi College of Engg
INTERMEDIATE EDUCATION at Sri Chaitanya College of Education
