Surendra Tadi

CEO

Bengaluru, Karnataka, India22 yrs 8 mos experience

Highly Stable

Key Highlights

20 years of experience in VLSI and verification.
Expert in managing cross-functional teams for complex projects.
Pioneered innovative methodologies in verification processes.

Stackforce AI infers this person is a Telecommunications and Semiconductor expert with extensive experience in verification and management.

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Skills

Core Skills

VerificationManagementDesign Engineering

Other Skills

IP/Subsystem verificationFormal verificationLow power verificationPerformance VerificationCross-functional collaborationMulti Core Cache CoherencyDDR controller verificationEnd-to-end SoC verificationFormal verification methodologiesSoCASICVerilogSystemVerilogFunctional VerificationVLSI

About

• Dynamic, Performance Oriented Professional with 20 years of experience in VLSI : Served as Manager/Lead and individual Contributor for IP/Subsystem & SOC verification. Currently working in Qualcomm which is industry leader in chip designing and a pioneer for 5G technology. • Currently Managing WLAN MAC Verification Teams on 802.11n/ac/ax/be Designs at Qualcomm, Wireless R&D Bangalore Design Centre. • Technical Skills: Lead Verification of 802.11 Wireless LAN MAC IP and Subsystem, Lead TCP/IP & L3/L4 Offload verification of a highly complex architecture, Lead verification of CPU subsystem, Cache Architecture, Multi Core Coherency, Expertise in verifying DDR Controller, NOC, Debug Infrastructure at IP/Subsystem. Expertise in ARM/DSP based System on chip verification for Mobile/Networking SoC • Domain expertise includes Random/Directed verification using UVM/SV based Testbench, UPF based Low Power, Formal, SDF/GLS, Performance verification at IP/SoC. • More than 7 years of Extensive People Management Experience. Experienced in managing teams for end-to-end Verification (IP, Subsystem and SoC) across GEOs. Strong ability in leading cross-functional teams and coordinating with various internal and external stakeholders. • Self-motivated, Organized, Proactive and go to Person. Possesses leadership, team building, communication, interpersonal, and presentation skills.

Experience

22 yrs 8 mos

Total Experience

4 yrs 3 mos

Average Tenure

1 yr

Current Experience

Qualcomm

3 roles

Principal Manager

Promoted

Apr 2025 – Present · 1 yr

Sr staff Engg/Mgr

Promoted

Dec 2017 – May 2022 · 4 yrs 5 mos

Managed execution and Quality of IP/Subsystem verification of MAC implementation for 802.11ac/ax/be
Managed Verification for highly complex IP which implements L2/L3/L4 layer functions in HW thereby offloading SW MIPS.
Deployed extensive Formal verification, Low power verification, Performance Verification usage to improve DV quality and find early design bugs.
Driven innovative DV methodologies to improve overall process & execution efficiency.
Interface with Core Team, Subsystem, SOC teams and Program Management for verification function.
Collaborate with other functional verticals such as Architecture, Design, Pre/Post Silicon, Software/Firmware for managing dependencies.

IP/Subsystem verificationFormal verificationLow power verificationPerformance VerificationCross-functional collaborationVerification+1

Staff Engineer

May 2015 – Nov 2017 · 2 yrs 6 mos

Intel corporation

SOC DV Verification Manager

May 2022 – Apr 2025 · 2 yrs 11 mos · Bengaluru, Karnataka, India

Freescale semiconductor

2 roles

Lead Design Engineer

Promoted

Apr 2011 – Apr 2015 · 4 yrs

Managed and Lead Multi Core Cache Coherency protocol verification for a highly complex platform designed to provide high performance & Throughput for many generations of the Platform.
Managed and Lead highly complex DDR controller verification which supports DDR2, DDR3, DDR4, LPDDR devices.
Extensive Contribution in end2end system on chip verification for wireless and Networking cores with greatly built expertise in entire SoC data path including, CPUs, NOC, Cache coherent Platform, DDR, Debug Infrastructure, Data Path processing Engines etc.
Extensive contribution in GLS/SDF bringup of a highly complex SoC for many generations of Wireless and N/W cores.
Extensive Contribution in Formal based verification methodologies such as CDC, SEQ, Connectivity

Multi Core Cache CoherencyDDR controller verificationEnd-to-end SoC verificationFormal verification methodologiesVerificationDesign Engineering