SHIVAKUMAR BARLA — Software Engineer

 Working Experience on cutting edge TSMC 16nm, 14nm, 7nm, 5nm, Samsung 11nm and 10nm Technologies.  Worked on Logical and Physical Aware Synthesis.  Worked on Block Level Floor planning, Placement, CTS and Route.  Worked on Physical verification checks name LVS, DRC, ERC, PERC, ANTENNA, EM, IR and DENSITY Violations.  Worked on Power, Timing and Area Improvements for Blocks having Multi-voltage and multimillion Instances.  Good understanding of low Power design techniques & STA.  Handled blocks in ECO phase responsible for Timing and functional.  Good scripting skills in TCL, PERL and Knowledge in Verilog HDL.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Verification.

Location: Warangal, Telangana, India

Experience: 8 yrs 8 mos