Chetan Chowdary Mandava — Software Engineer
I work as a Sr Design Verification Engineer with expertise in SystemVerilog, UVM and Python. I ensure to develop required expertise in team to deliver a quality RTL. I have an in-depth experience in AXI, AHB, LPDDR5, MIPI-CSI2 protocols. I am trying to build my expertise in PCIe, CLX, UCIe protocols. I hold two patents in IoT, AI enabled end user produi. I always ensure to improve skills and knowledge through a process of continuous learning.
Stackforce AI infers this person is a Semiconductor Verification Engineer with a focus on advanced design methodologies.
Location: Hyderabad, Telangana, India
Experience: 7 yrs 7 mos
Skills
- Universal Verification Methodology (uvm)
- Systemverilog
- Performance Verification
Career Highlights
- Expertise in SystemVerilog and UVM for design verification.
- Patented innovations in IoT and AI-enabled products.
- Proven track record in performance verification of complex systems.
Work Experience
NVIDIA
Senior Design Verification Engineer (1 yr 4 mos)
AMD
Sr. Silicon Design Engineer (1 yr 8 mos)
AMD India Pvt Ltd
Senior Design Engineer (1 yr 8 mos)
Qualcomm
Design Verification Engineer (2 yrs 6 mos)
Associate Engineer (2 yrs 1 mo)
Indian Institute of Technology, Hyderabad
Summer Research Fellow (2 mos)
Indian Institute of Science (IISc)
Winter Intern (1 mo)
Defence Electronics Research Laboratory
Summer Intern (2 mos)
Education
Bachelor of Technology (BTech) at National Institute of Technology Hamirpur-Alumni