V

Vinod Kumar CK

Software Engineer

Bengaluru, Karnataka, India6 mos experience

Key Highlights

  • Expert in ASIC Physical Design with VLSI experience.
  • Proven track record in 7nm projects for major clients.
  • Strong analytical skills in physical design and timing analysis.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and VLSI technologies.

Contact

LinkedIn

Skills

Core Skills

Physical Design

Other Skills

Analytical SkillsVery-Large-Scale Integration (VLSI)Synopsys toolsIntegrated Circuits (IC)ic compilerClock Tree SynthesisDesign Flowfloor planningApplication-Specific Integrated Circuits (ASIC)Field-Programmable Gate Arrays (FPGA)TroubleshootingStrategic PlanningPublic SpeakinglinuxMatlab

About

Physical design Engineer

Experience

6 mos
Total Experience
--
Average Tenure
--
Current Experience

Nxp semiconductors

ASIC Physical Design Engineer

Jun 2024 – Present · 2 yrs · Bengaluru, Karnataka, India · On-site

Amd

Physical design and sta engineer

Mar 2022 – May 2024 · 2 yrs 2 mos · Bengaluru, Karnataka, India

Analytical SkillsPhysical Design

Broadcom inc.

Sta engineer

Aug 2020 – Mar 2022 · 1 yr 7 mos · Bengaluru, Karnataka, India

Soctronics

Physical Design and STA Engineer

Jul 2018 – Aug 2020 · 2 yrs 1 mo · Greater Hyderabad Area

  • I worked in this company as physical design engineer in 2 projects 7nm for AMD client

Vlsiguru training institute

Physical Design Trainee

Dec 2017 – Jul 2018 · 7 mos · Bengaluru, Karnataka, India

Education

Bangalore Technological Institute, BANGALORE

Bachelor of Engineering - BE

Jan 2012 – Jan 2017

National PU College ,Jyanagar

Pre university course — PCMB

Jan 2010 – Jan 2012

government high school agara bengaluru

10th — High School/Secondary Diplomas and Certificates

Jan 2007 – Jan 2010

Stackforce found 100+ more professionals with Physical Design

Explore similar profiles based on matching skills and experience

Pranav Vyas

Pranav Vyas

Director-ASIC Physical Design

at VeriFast Technologies

India22 yrs exp
Shashidhar Kondaguli

Shashidhar Kondaguli

ASIC Physical Design Engineer

at Wipro

Bengaluru, India8 yrs exp
Very-Large-Scale Integration (VLSI)
Bhuvana V

Bhuvana V

Principal Engineer

at GlobalFoundries

Bengaluru, India5 yrs 8 mos exp
Static Timing Analysis
madhavan r

madhavan r

Product Engineer

at Siemens EDA (Siemens Digital Industries Software)

Tamil Nadu, India9 yrs 2 mos exp
SoC designVLSI
GR

Govinda Raju

Validation Lead

at Intel Corporation

Bengaluru, India20 yrs 1 mo exp
Functional VerificationStatic Timing Analysis
RB

Rama Narendra kumar Boddu

Senior Staff Engineer/Manager

at Qualcomm

Bengaluru, India16 yrs 2 mos exp
Low Power DesignPower AnalysisFront-End ImplementationTiming Analysis
Naveen Neelapala

Naveen Neelapala

Senior Manager, Device Technology

at Micron Technology

Hyderabad, India15 yrs 6 mos exp
VLSITiming SignOffStatistical ModelingVirtual MetrologyVLSI Physical Design
Aadil Bashir

Aadil Bashir

Physical Design Engineer

at 3rdiTech Inc.

Bangalore Urban, India3 yrs 9 mos exp
Physical DesignFPGA & HDL