Akshat Gupta

Software Engineer

Alwar, Rajasthan, India4 yrs 9 mos experience

Key Highlights

  • Expert in Assertion Based Verification for semiconductor quality.
  • Strong background in digital electronics and verification methodologies.
  • Proficient in SystemVerilog and UVM for complex projects.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in digital electronics and verification methodologies.

Contact

Skills

Core Skills

Assertion Based VerificationSystemverilog

Other Skills

Digital ElectronicsUniversal Verification Methodology (UVM)VCSRALFunctional VerificationVerilogC++Static Timing Analysis

About

As a SoC Verification Engineer at Qualcomm, I apply my skills in digital electronics and assertion-based verification to ensure the quality and functionality of complex semiconductor devices. I have a strong background in electrical, electronics, and communications engineering, with a Bachelor of Technology degree from National Institute of Technology Hamirpur. I also have experience in working with data centre groups for verification of bridge involving translation of protocol interface to fabric interface and vice-versa. Additionally, I have completed certifications in Python and OpenCL on FPGAs, which enhance my ability to work with diverse technologies and tools. My goal is to continue learning and growing as a verification engineer, and to contribute to the development of innovative and reliable semiconductor solutions.

Experience

4 yrs 9 mos
Total Experience
2 yrs
Average Tenure
8 mos
Current Experience

Ibm

Design Verification Engineer

Oct 2025Present · 8 mos · Bengaluru, Karnataka, India · Hybrid

Qualcomm

SoC Verification Engineer

May 2023Sep 2025 · 2 yrs 4 mos · Bengaluru, Karnataka, India · Hybrid

Assertion Based VerificationDigital Electronics

Intel corporation

IP Verification Engineer

Aug 2021May 2023 · 1 yr 9 mos · India

  • Worked with Data Centre group for verification of Bridge involving translation of protocol interface
  • to fabric interface and vice-versa
SystemVerilogUniversal Verification Methodology (UVM)

Indian institute of technology, patna

Research Intern

May 2019Jul 2019 · 2 mos · Patna, Bihar, India

Education

National Institute of Technology Hamirpur

Bachelor of Technology - BTech

Jan 2017Jan 2021

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