R V Ratnam Naidu Yalla

Co-Founder

Bengaluru, Karnataka, India14 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Physical Design across multiple tech nodes.
  • Successfully led teams and mentored junior engineers.
  • Proven track record in Static Timing Analysis and project management.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and project management.

Contact

LinkedIn

Skills

Core Skills

Physical DesignProject Management

Other Skills

Static Timing AnalysisScriptingDRCFCTPnR MethodologyPrimetimeTiming ClosureFloorplanningClock Tree SynthesisPhysical VerificationTCLPerl ScriptFirst EncounterICCConformal LEC

About

Successfully done tapeouts in 28nm and 16nm tech nodes. currently working on 7nm node. Part of multiple successful tapeouts. Worked on all technical aspects of Physical design (PnR, PV, STA). Good in scripting and methodology. Leading team and training/mentoring young engineers.

Experience

14 yrs 10 mos
Total Experience
2 yrs 11 mos
Average Tenure
6 yrs 9 mos
Current Experience

Fabic design solutions pvt ltd

Co-Founder

Sep 2019 – Present · 6 yrs 9 mos · Bangalore

Static Timing AnalysisPhysical DesignProject ManagementScripting

Juniper networks

ASIC Engineer 3

Mar 2018 – Aug 2019 · 1 yr 5 mos · Bengaluru Area, India

Synapse design inc.

Technical Lead

Feb 2015 – Mar 2018 · 3 yrs 1 mo · Bengaluru Area, India

  • Took different technical challenges (from DRC fixing to FCT and PnR Methodology) and leading challenges ( from individual player to manager)
DRCFCTPnR MethodologyPhysical DesignProject Management

Soctronics (amd-odc)

P&R Engineer

Jan 2012 – Feb 2015 · 3 yrs 1 mo · Hyderabad Area, India

Veda iit

Engineering Trainee

Jul 2011 – Jan 2012 · 6 mos · Hyderabad Area, India

Education

VEDA INSTITUTE OF INFORMATION TECHNOLOGY PRIVATE LIMITED

PGDiploma in VLSI — Physical Design

Jan 2011 – Jan 2012

GOKUL INSTITUTE OF TECHNOLOGY AND SCIENCES, PIRIDI, BOBBILI, AP PIN- 535558 (CC-H9)

B.Tech — Electronics & communication engineering

Jan 2007 – Jan 2011

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