Oct 2024 – Dec 2024 · 2 mos · Bengaluru, Karnataka, India · Hybrid

Mar 2023 – May 2024 · 1 yr 2 mos · Bengaluru, Karnataka, India · On-site

• Providing Support for RedHawk-Sc to Customers.

May 2024 – Oct 2024 · 5 mos · Bengaluru, Karnataka, India · Hybrid

Aug 2021 – Feb 2023 · 1 yr 6 mos · Noida, Uttar Pradesh, India

• Thermal Analysis(VOLTUS)
• Root level analysis of temperature impact on Resistance & EM on various customer designs
• Developing Spec for supporting merging of powermap & Enabling Early stage Chip Temperature Map identification.
• Created Python Scripts to mantain the quality of results builds to builds with TAT to process 10M lines in 5min.
• Setup regression flows for features coverage of thermal & Self Heating flows, and specific features like trilib_interpolation,Merge_vtm_flow,thermal_aware_emir & coded scripts to automate their validity.
• CELSIUS(Thermal_Simulation_Tool)
• Generated Chip_Temperature map file based upon following parameter
• Power_density,Heat_sink,thermal_conductivity,moulded_compound,air_flow & feed the generated temperature_map file into voltus & validate the results of thermal_aware_emir on multiple segments in multiple scenarios.
• Vectorless_power
• Validated power & rail results in CAT with identifying the scheduling & corresponding switching time calculation based on multiple_user_defined_activity & twf.
• Created scripts to get cyclewise_instance_switching report for every type of cells(i.e seq,comb,clkcomb etc)can process 10M lines in 5min & generates intermediate files cell_wise make easier to analyse the switching profile.
• 3DIC_Validation
• Converted single_die designs into multi_die with interposer & die_stack_mapping_file.
• Validation of reff & rlrp path tracing of multi_die designs with pkg substrate.
• Automation
• Created multiple python scripts to improve TAT for debugging.
• Thermal_power_map & metal_density QA
• SelfHeat reports QA
• n number macro_based_deisgn creation script with mention -n <number> it can create rtl2gds processs with design having n macros like py macro.py -n 300 gets 300 macro design
• Cycle_wise_coverage script helps in giving instance switching info cyclewise with each category differentiated based on cell_types(macro.seq.comb,io etc)
• avgToggleRate script to get each instance avg toggle_rate.

Jan 2021 – Jul 2021 · 6 mos · Noida, Uttar Pradesh, India

• RTL2GDS & PDN(genus-innovus-voltus)
• Synthesis, floor-planning (place-route, power grid creation) and simulation (vectors - vcd, shm, fsdb, phy, saif) of digital blocks incorporating advanced cells i.e. scan flops, multi-bit flops, integrated clock gating cells to experiment and develop the functionalities of static and transient power.
• Created CPF based 2 power_domain designs & done power & rail analysis on it.
• Evaluating switching, power reporting and dynamic current waveforms, instances voltage drops of instances in digital chip by computation of energy tables in Non Linear Delay Models (NLDM), Effective Current Source Model (ECSM) and Composite Current Source Model (CCS-P) liberties based on factor of input slew and output load.
• Analyzing violations reported based on current density during electromigration (EM) analysis in signal and power/ground nets of design chip w.r.t to EM rules mentioned in technology file & created scripts to get the layerwise worst resistor segments.
• Virtuoso_layout_editor
• Created Custom layouts to improve extraction on RDL Layer shapes & Run power & rail anlysis to see false em violation & false resistor fracturing.