G

Gagandeep Prasher

Software Engineer

Bengaluru, Karnataka, India12 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in PCIE GEN4 and UVM methodologies.
  • Extensive experience in SoC and IP verification.
  • Strong understanding of ARM architecture and protocols.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SoC and IP verification methodologies.

Contact

Skills

Core Skills

PcieUvmArm

Other Skills

SoCWLANSoC verificationtestbench developmentUniversal Verification Methodology (UVM)IP verificationCode CoverageCRTL Verificationsystem verilogAMBA AHBGLSFunctional Coverage

About

Currently ,I am working in gchips dv team . Previously worked as Senior Lead verification engineer in MAC DV Team of WLAN in Qualcomm.I have worked extensively in PCIE GEN4 ,UVM,ARM blocks and have knowledge of various protocols such as PIPE ,AXI,ATB,JEDEC,AHB etc.

Experience

12 yrs 8 mos
Total Experience
4 yrs 5 mos
Average Tenure
3 yrs 10 mos
Current Experience

Google

2 roles

Senior Verification Engineer

Apr 2025Present · 1 yr 2 mos · Bengaluru, Karnataka, India

Silicon Design Verification Engineer

Aug 2022Apr 2025 · 2 yrs 8 mos · Bengaluru, Karnataka, India

Qualcomm

Senior Lead Engineer

Apr 2020Aug 2022 · 2 yrs 4 mos · Bengaluru, Karnataka

PCIEUVMARMSoCWLAN

Nxp semiconductors

3 roles

Lead Design Engineer

Promoted

Apr 2018Mar 2020 · 1 yr 11 mos

senior Verification Engineer

Promoted

Apr 2016Mar 2018 · 1 yr 11 mos

IC1 Design Engineer

Jul 2013Mar 2016 · 2 yrs 8 mos

  • I am working as a Senior Lead Verification Engineer in Qualcomm , Bangalore.
  • Prior to this, I have worked for 7 years in NXP/Freescale. During the period of my 7 years in NXP,I have worked mainly in Soc Verification apart from IP subsystem level verification for 6 months .
  • Below are the details of blocks and methodologies on which I have worked extensively
  • a)PCIE:
  • From last 1.5 years,I am working on GEN4 PCIE Soc verification .My work has ranged from covering Soc scenarios,IP scenarios,performance and validation support .The learning has been great owing to new IP.
  • b) UVM:
  • I have worked extensively in UVM both at IP level for 6 months and at Soc level.In IP verification,I wrote testbench components such as driver,monitor,scoreboard,Agent and sequences from scratch .
  • c) GIC-500:
  • I did Soc verification of GIC-500 ,interrupt controller based on ARM V3 Architecture.
  • With it,I have also been able to develop basic understanding of some ARM core concepts
  • especially its exception levels,Hypervisor and need of Virtualization up to some extent.
  • d) ARM coresight blocks:
  • ETF
  • ETR
  • FUNNEL
  • CTI
  • DAP
  • I have done Soc Verification of ARM coresight blocks mentioned above extensively.
  • On below items,I have decent understanding :
  • f)Ethernet (XFI and RGMII)
  • I have worked for 5 months on Ethernet interfaces XFI and RGMII.I developed decent understanding of these two protocols .
  • f) Basic working knowledge of Perl and shell scripting as I handled Regression in one of the Projects in Freescale

Education

PEC University of Technology Chandigarh

Bachelor of Engineering (BE)

Jan 2009Jan 2013

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Gagandeep Prasher - Software Engineer | Stackforce