H

Harsh Dholakiya

Software Engineer

Bengaluru, Karnataka, India6 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Pre Silicon Verification Engineering.
  • Strong background in VLSI and Functional Verification.
  • Proficient in SystemVerilog and UVM methodologies.
Stackforce AI infers this person is a VLSI Verification Engineer with expertise in Pre Silicon methodologies.

Contact

LinkedIn

Skills

Core Skills

Verification And Validation (v&v)Very-large-scale Integration (vlsi)

Other Skills

SystemVerilog + UVM/OVMVerilogFunctional VerificationMicrosoft ExcelMicrosoft OfficeCMicrosoft WordMicrosoft PowerPointC++MatlabSyatemVerilogCadance VirtuosoMicrowindNC-VerilogVisual TCAD

About

Verification Engineer,

Experience

6 yrs 8 mos
Total Experience
3 yrs 4 mos
Average Tenure
4 yrs 5 mos
Current Experience

Intel corporation

Pre Silicon Verification Engineer

Jan 2022 – Present · 4 yrs 5 mos

SystemVerilog + UVM/OVMVerilogVerification and Validation (V&V)Very-Large-Scale Integration (VLSI)Functional Verification

Qualcomm

Senior Engineer

Sep 2019 – Dec 2021 · 2 yrs 3 mos · Greater Bengaluru Area

Intel tech. india private limited,bangalore

Intern

Jul 2018 – Aug 2019 · 1 yr 1 mo · Bengaluru, Karnataka, India

  • Worked as Intern in front end verification team.

Education

Institute of Technology, Nirma University

M.Tech — VLSI Design

Jan 2017 – Jan 2019

Birla Vishvakarma Mahavidhyala

Bachelor of Engineering - BE — Electronics and Telecommunication

Jan 2013 – Jan 2016

Nirma University, Ahmedabad

Diploma in Electronics and Communication

Jan 2010 – Jan 2013

Stackforce found 100+ more professionals with Verification And Validation (v&v) & Very-large-scale Integration (vlsi)

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