Shubham Kumar — Product Engineer
I'm a Mtech graduate from NIT Patna and I have worked in both the leading EDA companies (Cadence & Synopsys). My skill set is Analog Circuit Design Like- LDO, OP-AMP, OTA, PLL, Oscillator, Bandgap Reference Circuit, SerDes. I worked on product specific tools like - Cadence AI Flow, Cadence Virtuoso, Auto Placement and Routing (APR), Custom Compiler, IC Validator, ICV Live, Calibre, HFSS, Layout Design on Advance Node (2nm, 3nm, 5nm, 16nm) , Physical Verification, Parasitic Extraction, ICC2, Tempus, 3D IC.
Stackforce AI infers this person is a skilled engineer in the EDA industry with a focus on analog circuit design and verification.
Location: Noida, Uttar Pradesh, India
Experience: 5 yrs 5 mos
Skills
- Physical Verification
- Ip Development
- Pdk Development
- Design Rule Checking (drc)
- Systemverilog
- Verilog-a
Career Highlights
- Expert in Analog Circuit Design with extensive EDA experience.
- Proficient in advanced node layout design and physical verification.
- Strong background in developing and applying Cadence AI tools.
Work Experience
Cadence Design Systems
Senior Product Engineer (3 yrs 5 mos)
Synopsys Inc
Product Application Engineer (5 mos)
Scaledge Technology
ASIC Design and Verification (5 mos)
National Institute of Technology , Patna
Graduate Research And Teaching Assistant (2 yrs)
Bharat Sanchar Nigam Limited
Summer Internship (1 mo)
Education
Master of Technology - MTech at National Institute of Technology , Patna
Engineer’s Degree at Savitribai Phule Pune University
Higher Secondary School at Holy Mission Secondary School
Secondary School Certificate(SSC) at B.D. Public School