S

SHIVANGI SINGH

Product Engineer

Bengaluru, Karnataka, India3 yrs 8 mos experience
Highly Stable

Key Highlights

  • 3+ years in advanced technology nodes layout design.
  • Proficient in Cadence Virtuoso and layout verification.
  • Expertise in delivering tapeout-quality designs.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in layout design and verification.

Contact

LinkedIn

Skills

Core Skills

Layout DesignCadence Virtuoso

Other Skills

Analog LayoutScriptingAnalog SemiconductorsSemiconductor EngineeringDesign Rule Checking (DRC)IOLayout Versus Schematic (LVS)Cadence Virtuoso Layout EditorUnixEngineeringEnglishDebuggingBashCommunicationPerl

About

IO/AMS Layout Design Engineer with 3+ years of experience in advanced technology nodes (40nm,28nm,22nm,16nm)focusing on IO layouts. Proficient in Cadence Virtuoso, Calibre, and scripting to automate and optimize layout and verification tasks. Hands-on experience with layout design release and review process, IO ring integration, antenna/latch-up fixes, and thorough physical verification (DRC, LVS, ERC), EM/IR analysis, ESD compliance, and delivering tapeout-quality designs with high accuracy.

Experience

3 yrs 8 mos
Total Experience
3 yrs 8 mos
Average Tenure
3 yrs 8 mos
Current Experience

Genisup india pvt. ltd.

Layout Design Engineer

Oct 2022 – Present · 3 yrs 8 mos · Bengaluru, Karnataka, India · On-site

Layout DesignCadence Virtuoso

510 army base work shop

Internship Trainee

Jun 2021 – Aug 2021 · 2 mos · Uttar Pradesh, India

Education

Dayalbagh Educational Institute

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jul 2022 – Dec 2026

Dayalbagh Educational Institute

Diploma in Electronics Engineering

Jan 2019 – Jan 2022

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