Hai Pham — Product Engineer
Design Verification Engineer with 4 years of experience: + UCIe IP gen2 + HighSpeed SS Serdes (Ethernet, MIPI, LVDS). + DDR IP (LPDDR4 and DDR5). + AMBA protocol (APB, AHB, AXI). + Computer peripheral communication protocol (UART, SPI and I2C). + Video Processing IP (TCON). + UVM / Testplan / Scripting. Engineer's Degree at Ho Chi Minh City University of Technology: + Major: Electrical and Electronics Engineering. + GPA: 8.89/10 (1st rank in class) + Academic Incentive Scholarship & OISP Scholarship (all semesters)
Stackforce AI infers this person is a Design Verification Engineer with expertise in high-speed communication protocols and verification methodologies.
Location: Singapore, Singapore
Experience: 4 yrs 5 mos
Skills
- Design Verification
Career Highlights
- Top-ranked graduate with GPA of 8.89/10.
- Experience in high-speed communication protocols.
- Proficient in UVM and test planning methodologies.
Work Experience
AMD
Design Verification Engineer (1 yr 2 mos)
Synopsys Inc
SOC Engineering, Senior Design Verification Engineer (4 mos)
Uniquify Viet Nam
Logic Design Engineer (2 yrs 2 mos)
Logic Design Intern (3 mos)
Ho Chi Minh City University of Technology (HCMUT)
Team Member at Bach Khoa Innovation 2021 (9 mos)
Education
Engineer's degree at Ho Chi Minh City University of Technology
