Jose Martinez Bertozzi

CEO

Chile11 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in Reliability Verification and thermal analysis.
  • Proficient in VLSI and electronic design tools.
  • Strong background in test content development.
Stackforce AI infers this person is a skilled professional in Electronics and VLSI design.

Contact

LinkedIn

Skills

Core Skills

Electronics

Other Skills

Test Content DevelopmentVery-Large-Scale Integration (VLSI)Thermal AnalysisVerdiProgrammingLinuxMicrosoft OfficeMatlabWindowsJavaAutoCADC++VerilogCustomer ServiceRedhawk

About

Structural Designer experienced in Reliability Verification, power and thermal analysis. Knowledge in ICC, ICC2, Primetime. Test Content Developer

Experience

11 yrs
Total Experience
3 yrs 8 mos
Average Tenure
4 yrs 3 mos
Current Experience

Synopsys inc

2 roles

Sr. Supervisor

Feb 2025 – Present · 1 yr 4 mos

Application Engineer, Sr II

Mar 2022 – Present · 4 yrs 3 mos

Intel corporation

Electric Engineer

Nov 2015 – Mar 2022 · 6 yrs 4 mos

  • Test Content Developer

Sykes enterprises, inc.

Electronic Engineer

Apr 2015 – Sep 2015 · 5 mos

Education

Universidad San Marcos

Master's degree — Human Resources Management and Services

Jan 2019 – Jan 2021

Universidad de Costa Rica UCR

Ingeniería — Ingeniería eléctrica y electrónica

Jan 2010 – Jan 2014

Stackforce found 100+ more professionals with Electronics

Explore similar profiles based on matching skills and experience

Ajitesh Mishra

Ajitesh Mishra

Senior Engineer

at Sandisk

Bengaluru, India7 yrs exp
Application-Specific Integrated Circuits (ASIC)Hardware EngineeringFunctional VerificationSAPDevOps
Akshay Kinake

Akshay Kinake

Staff Signoff Application Engineer

at Synopsys Inc

Bengaluru, India3 yrs 11 mos exp
Full Chip timing signoffSMC 3DIC STATiming ClosurePerformance Optimization
Srinath Jeevakumar

Srinath Jeevakumar

Senior Architect

at NVIDIA

Bengaluru, India6 yrs 8 mos exp
Performance VerificationSilicon Bring-upPerformance Analysis
Ashutosh Rao

Ashutosh Rao

R&D Engineer

at Synopsys Inc

Bengaluru, India4 yrs 4 mos exp
Static Timing AnalysisCircuit DesignHardware Security
Abhijeet Shahapurkar

Abhijeet Shahapurkar

Staff Engineer

at Synopsys Inc

Bengaluru, India4 yrs 5 mos exp
Digital IC DesignPhysical Design
Venkiteswaran P N

Venkiteswaran P N

Associate

at PwC India

Hyderabad, India1 yr 9 mos exp
Data MigrationSAP HANA
Rojan Karn

Rojan Karn

Senior Firmware Engineer, Pre-Silicon Emulation

at NVIDIA

San Francisco, United States2 yrs 1 mo exp
Hardware EmulationFunctional VerificationPython (Programming Language)Hardware TestingDigital Circuit Design
Dheeraj Kumar

Dheeraj Kumar

Sr. Application engineer - PCIE VIP

at Synopsys Inc

Sunnyvale, United States3 yrs 11 mos exp
Universal Verification Methodology (UVM)PCIE ProtocolDesign VerificationVLSI VerificationSystemVerilog