Tushar Yadav

Software Engineer

Delhi, India4 yrs 1 mo experience
Highly Stable

Key Highlights

  • Experienced in ASIC digital design and verification.
  • Proficient in SystemVerilog and Verilog for complex designs.
  • Strong foundation in Electronics and Communication Engineering.
Stackforce AI infers this person is a Digital Design Engineer specializing in ASIC development.

Contact

LinkedIn

Skills

Core Skills

SystemverilogVerilog

Other Skills

Universal Verification Methodology (UVM)C++ElectronicsPython (Programming Language)SimulationsPSpiceDigital Circuit Design

Experience

4 yrs 1 mo
Total Experience
4 yrs 1 mo
Average Tenure
4 yrs 1 mo
Current Experience

Synopsys inc

ASIC Digital Design Engineer

May 2022 – Present · 4 yrs 1 mo · Noida, Uttar Pradesh, India

SystemVerilogVerilog

Education

Netaji Subhas Institute of Technology

Bachelor of Engineering - BE — Electronics and Communication engineering

Jan 2018 – Jan 2022

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