Vishwanath Telagadi

Product Engineer

Bengaluru, Karnataka, India1 yr 11 mos experience

Key Highlights

  • Expert in Digital Electronics and Verilog.
  • Strong background in Static Timing Analysis.
  • Experience in Low-power Design methodologies.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in digital electronics and low-power design.

Contact

LinkedIn

Skills

Core Skills

Digital ElectronicsVerilog

Other Skills

Static Timing AnalysisLow-power DesignPython (Programming Language)Microsoft OfficeMatlabCBasic JavaAssembly LanguageVery-Large-Scale Integration (VLSI)

Experience

1 yr 11 mos
Total Experience
1 yr 11 mos
Average Tenure
1 yr 11 mos
Current Experience

Qualcomm

2 roles

Engineer

Jul 2024 – Present · 1 yr 11 mos · Bangalore · Hybrid

  • Design Verification Engineer
Digital ElectronicsVerilogStatic Timing AnalysisLow-power Design

Engineer

Jan 2024 – Jul 2024 · 6 mos · Bangalore · Hybrid

Intel corporation

Graduate Technical Intern

May 2023 – Jun 2023 · 1 mo · Bengaluru, Karnataka, India · Hybrid

  • Design Verification

Education

Indian Institute of Technology, Guwahati

Master's degree — VLSI

Jul 2022 – Jan 2024

Ramaiah Institute Of Technology

Bachelor of Engineering

Jan 2016 – Jan 2020

Alva's College, Moodabidri, Karnataka

PRE University College — PCMB

Jan 2014 – Jan 2016

Om National Public School,Ranibennur

Bachelor of Engineering - BE

Jan 2008 – Jan 2014

National Public School,Ranibennur

School

Jan 2004 – Jan 2008

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