Linh Le — Director of Engineering
================================================ I'm looking for DV and DFT engineers to join the team to work on high speed interface PHY IPs. Feel free to drop me a message if you are interested in these positions. ================================================ Digital IC Design Lead with 20 years of expertise in end-to-end SoC development, from IP-level RTL architecture to chip-top SoC timing closure. Proven track record of leading multiple successful tape-outs by managing cross-functional resources and schedules. Expert in RTL design, UVM verification, Synthesis, STA, with a specialized ability to build high-performing design teams from the ground up. Adept at bridging front-end and back-end teams to ensure good quality and on-time delivery of complex IP and Soc products.
Stackforce AI infers this person is a Digital IC Design expert with extensive experience in ASIC and SoC development.
Experience: 19 yrs 11 mos
Career Highlights
- 20 years of expertise in SoC development.
- Proven track record of successful tape-outs.
- Expert in building high-performing design teams.
Work Experience
Synopsys Inc
Senior Manager, ASIC Digital Design - Site Manager (5 yrs 7 mos)
Savarti AMS (now Marvell Vietnam)
ASIC Digital Design Manager (5 yrs 3 mos)
Viettel R&D
ASIC Design Engineer (1 yr 6 mos)
Renesas Design Vietnam Co., Ltd.
Staff Engineer (7 yrs 7 mos)
Education
Bachelor of Science (BS) at University of Natural Sciences, Ho Chi Minh City, Vietnam