Dilraj Ck — Software Engineer
Stackforce AI infers this person is a highly skilled engineer in VLSI and ASIC design.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 6 mos
Skills
- Static Timing Analysis
- Verilog
Career Highlights
- Expert in static timing analysis and verification.
- Proficient in Verilog and TCL scripting.
- Strong background in digital and analog circuit design.
Work Experience
Synopsys Inc
Staff Engineer (1 yr 5 mos)
Senior Engineer (1 yr)
Application Engineer II (3 yrs 1 mo)
Technical Intern (9 mos)
Education
Master's degree at National Institute of Technology Calicut