Sanvedana Date

Software Engineer

Bengaluru, Karnataka, India7 yrs experience

Highly Stable

Key Highlights

Experienced in application engineering at top tech firms.
Strong background in physical design and timing analysis.
Proven track record in hybrid work environments.

Stackforce AI infers this person is a seasoned Application Engineer with expertise in EDA tools and physical design.

Contact

Skills

Other Skills

FloorplanningPlacement and routingStatic Timing Analysis

About

Working in synopsys Bangalore as a Senior Application Engineer.

Experience

7 yrs

Total Experience

3 yrs 1 mo

Average Tenure

10 mos

Current Experience

Cadence

Principal Application Engineer

Aug 2025 – Present · 10 mos · Bengaluru, Karnataka, India · Hybrid

Intel corporation

Physical Design Engineer

Oct 2024 – Aug 2025 · 10 mos · Santa Clara, California, United States · Hybrid

Synopsys inc

3 roles

Staff Application Engineer

Promoted

Feb 2024 – Oct 2024 · 8 mos

Application Engineer Sr l

Promoted

Nov 2021 – Feb 2024 · 2 yrs 3 mos

Application Engineer ll

Jun 2019 – Nov 2021 · 2 yrs 5 mos

Intel corporation

Intern

Jan 2018 – Jan 2019 · 1 yr

Physical design engineer intern

Stackforce found 100+ more professionals with Floorplanning & Placement and routing

Explore similar profiles based on matching skills and experience

CHANDAN JHA

Senior Hardware Engineer

at Qualcomm

Bengaluru, India5 yrs 9 mos exp

Physical DesignMicroarchitecture

Allen Nguyen

SOC Physical Design Engineer

at Synopsys Inc

Ho Chi Minh City, Vietnam5 yrs 3 mos exp

Physical DesignApplication-Specific Integrated Circuits (ASIC)

Swayam Satya Rout

Memory Design Engineer

at Texas Instruments India

Bengaluru, India3 yrs 2 mos exp

Very-Large-Scale Integration (VLSI)Digital Electronics

Nishant Gupta

Senior VLSI Design Engineer

at Sandisk

Bengaluru, India6 yrs 7 mos exp

FPGA IP Software DevelopmentFunctional VerificationDigital DesignsComputer Vision Systems DevelopmentFPGA Implementation

Shivaprasad Boddupally

Analog Design Engineer

at Sophrosyne Semiconductor

Nalgonda, India4 yrs 4 mos exp

Analog Integrated Circuit DesignElectronic Circuit DesignSilicon Validation

Gaurav Gupta

Senior R&D Manager

at Synopsys Inc

India14 yrs 6 mos exp

Circuit DesignVerificationSimulationLow Power Design

Navin Menon

FPGA Software Engineer

at Intel Corporation

Bengaluru, India17 yrs 7 mos exp

Very-Large-Scale Integration (VLSI)FPGA Software Engineering

Deepak Nagaria

R&D Principal

at Synopsys Inc

Delhi, India12 yrs 10 mos exp

IP Verification