KAIWALYA MUTYALWAR — Product Engineer
Specializing in verification of high-speed interface IPs like 16G, 25G, 32G and PCle7 SerDes, with expertise in developing test cases, assertions and constraints for RTL enhancements, debugging RTL issues. Experienced in supporting various teams and customer debugs by recreating test scenarios and proficient in using VCS, Verdi and ZeBu tools for verification and emulation. Passionate about solving complex verification challenges and continuously advancing skills in the ASIC and semiconductor fields.
Stackforce AI infers this person is a semiconductor verification specialist with a focus on ASIC design.
Location: Hyderabad, Telangana, India
Experience: 6 yrs 2 mos
Skills
- Verilog
- C++
Career Highlights
- Expert in high-speed interface IP verification.
- Proficient in RTL debugging and test case development.
- Strong background in ASIC and semiconductor verification.
Work Experience
Synopsys Inc
ASIC Digital Design Engineer (2 yrs 5 mos)
ASIC DIGITAL DESIGN ENGINEER (7 mos)
Controlytics AI Private Limited
Product Development Intern (4 mos)
SPIC MACAY NITW Chapter
Additional Secretary (1 yr 6 mos)
Executive Member (2 yrs)
ECEA NIT Warangal
Executive Member (10 mos)
Ronin Racing
DAQ Team Leader (2 yrs 5 mos)
Education
Masters of Technology (VLSI Design and Microelectronics) at Birla Institute of Technology and Science, Pilani
Bachelors of Technology at National Institute of Technology Warangal
Grade XII Science at Hislop College, Nagpur
JEE at IIT Home
Grade X ICSE at Abhyasa International Residential School