Venkat Akhil Kumar Podugu

Software Engineer

Bengaluru, Karnataka, India4 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Proven track record of successful tapeouts.
  • Strong ownership in IP and subsystem development.
  • Expertise in RTL design and SoC integration.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL and SoC development.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignSystem On A Chip (soc)

Other Skills

Problem SolvingCommunicationLintCDC/RDCSynthesisLECGLS debugECO closuresXilinx ISECDCDesign SpecificationsTeam Leadershipsoc integrationEngineeringLow-power Design

Experience

4 yrs 11 mos
Total Experience
2 yrs 5 mos
Average Tenure
3 yrs 2 mos
Current Experience

Texas instruments

Senior Design Engineer

Apr 2023 – Present · 3 yrs 2 mos · Bengaluru · On-site

  • Strong ownership across IP and subsystem development, including memory subsystems, control logic and ARM-based debug architecture, and mixed-signal digital interfaces.
  • Experience across the silicon lifecycle including RTL design, Lint, CDC/RDC, formal checks, Synthesis, LEC, GLS debug and ECO closures. Proven track record of 3 successful tapeouts, and leading top-level integration efforts.
Problem SolvingCommunicationRTL DesignSystem on a Chip (SoC)

Intel corporation

2 roles

SoC Design Engineer

Jun 2021 – Mar 2023 · 1 yr 9 mos · Bengaluru, Karnataka, India

Problem SolvingXilinx ISESystem on a Chip (SoC)

Graduate Technical Intern

May 2020 – Jul 2020 · 2 mos · Bengaluru, Karnataka, India

Xilinx ISECDC

Education

Indian Institute of Technology, Kharagpur

Master of Technology - MTech — Microelectronics and VLSI Design

Jan 2019 – Jan 2021

RGUKT Basar

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2015 – Jan 2019

Jawahar Navodaya Vidyalaya - JNV

Jun 2008 – Apr 2013

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