May 2022 – Dec 2022 · 7 mos · Ontario, Canada · On-site

• Research work on RRAM and Error Correcting Codes for Memory Architecture, supervised by Professor Manoj Sachdev.
• The Complementary Metal Oxide Semiconductor (CMOS) technology used in computer devices continues to scale for more functionality and lower power consumption. As a result of the continual and aggressive technological advances, memory design has become extremely difficult. Static Random Access Memory (SRAM) is currently the popular choice to implement embedded memories in complex System on Chip (SoC) applications. However, emerging Non-Volatile Memory (NVM) devices have been considered due to their tiny size and capacity to reduce leakage power since they can keep data even in the absence of a power supply.
• Resistive Random-Access Memory (RRAM) has been recognized as one of the most promising possibilities for the next generation of non-volatile memory because of its simple structure and great scalability. The RRAM device offers several benefits, including minimal programmability, a large ratio between high and low resistive states, and compatibility with the Complementary Metal Oxide Semiconductor (CMOS) fabrication process.
• Designed a 64-bit RRAM architecture, and implemented and tested it in the cadence TSMC 65nm.
• Designed 1T1R RRAM cell in the RRAM array to use it in the RRAM architecture. The designed architecture consists of a control unit which consists of (timing circuits), two 6X64 decoders, a bit-line block, and a sense amplifier. This design is analyzed, and simulation results are studied.
• Every aspect of RRAM is studied. The sense amplifier design for RRAM is a major contribution to the memory design of RRAM.
• Described the soft error problems and mechanisms in RRAM and proposed a way to address them using the traditional error correcting codes. The error correcting codes to be implemented on the designed RRAM architecture to resolve radiation soft error and reliability issues in RRAM were examined.

Apr 2019 – Jun 2021 · 2 yrs 2 mos · India · On-site

• Java developer expertise in telecommunications. Worked on different projects and gained a lot of knowledge on technologies like containerization, DevOps, and automation.
• ★Projects: OMF Containerization, Single BAN, Cross Border Towns, Alt TV, Smart Pay, DOSLB Core.
• ★Roles and Responsibilities:
• ➤ Middleware Application Development and production deployment.
• ➤ Designing CI-CD pipeline using DevOps.
• ➤ Analyzing and understanding System Requirements Specification (SRS) for new business requirements based on client proposals to develop an Order Management Framework.
• ➤ Designing the new code logically to support and develop the framework by making the System Design Specification (SDS).
• ➤ Implementing the designed code for the OMF services in JAVA language.
• ➤ Unit Testing, building, and deploying EAR’s in the WebLogic server to check the functionality via log validation.
• ➤ JBehave coding and Automation with syntax checking.
• ➤ Debugging code, analyzing logs, and resolving defects in ALM.
• ➤ OpenShift Console environments creation for OMF services and WebLogic server configuration.
• ➤ Building docker images and running containers for OMF services using DevOps.
• ➤ Creating and executing validation plans and test methods to validate performance requirements and delivering multiple technical projects on time.
• ➤ Responsible for maintaining the smooth flow of Internet, Television, Telephone, and Mobility services and mentoring new members of the team through Knowledge Transfer (KT).
• ★Technologies & Tools: Java, WebLogic Server 11g (10.3.6), eclipse neon.3(IDE), SoapUI-5.4.0, JBehave Automation, Docker Desktop, RedHat OpenShift Container Platform (Console), Git Bash, Windows PowerShell, UrbanCode Deploy, Jenkins, GitLab, Bitbucket, artifactory, Dynatrace, RightCoder, Notepad ++, Putty, FileZilla, Application Lifecycle Management (ALM), WinMerge, SSH Secure Shell.

May 2017 – Jun 2017 · 1 mo · Hyderabad, Telangana, India · On-site

• Designed Automatic Card testing and Displaying false diagnosis on PC, Microcontroller based system which measures the output voltages by giving inputs from the microcontroller to UUT (Unit Under Test)
• The designed system is utilized to automatically test the PCB cards before they are used in the mass production industries.
• The system achieved accuracy, speed, and some of the critical measurements which are not possible by manual means.