Gurunath Reddy Palabandla — Software Engineer
Worked on :: 14nm,10nm,5nm,7nm,4nm and 3nm, IFS18A tech nodes Tools :: FC,ICC1, ICC2, ICVWB, ICV and Calibre Performed :: LV analysis, DRC, LVS, ERC,PERC, Antenna checks, ECO implementation, EM, IR, RDL routing & cleanup and all other Physical verification signoff checks. worked on Intel, TSMC and Samsung foundry projects. Contact info :: pgurunathreddy33@gmail.com
Stackforce AI infers this person is a Physical Verification Engineer with expertise in semiconductor design and verification.
Location: Bengaluru, Karnataka, India
Experience: 8 yrs 7 mos
Skills
- Physical Verification
- Design Rule Checks
Career Highlights
- Expert in Physical Verification across multiple tech nodes.
- Proficient in industry-standard tools like Calibre and ICC.
- Experience with major foundries including Intel and TSMC.
Work Experience
Qualcomm
Sr. Lead Physical Verification Engineer (5 mos)
Synopsys Inc
Staff Solutions engineer (1 yr 11 mos)
Senior solutions engineer (8 mos)
Altran
Physical Verification engineer (5 yrs 8 mos)
Education
MTech at Birla Institute of Technology and Science, Pilani
Bachelor's degree at Sri Sai Baba National Degree College
