Pranav Tripathi

Software Engineer

Uttar Pradesh, India2 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC design and verification methodologies.
  • Proven track record in multi-protocol PHY verification.
  • Strong foundation in digital design and debugging.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC design and verification.

Contact

LinkedIn

Skills

Core Skills

Application-specific Integrated Circuits (asic)Universal Verification Methodology (uvm)

Other Skills

DebuggingVerilogAMBAAMBA AHBFormal Verificationusb typecHardware EngineeringProblem SolvingC++RTL CodingAssertionsPHYAXIAPBPerl

About

0

Experience

2 yrs 10 mos
Total Experience
2 yrs 10 mos
Average Tenure
2 yrs 10 mos
Current Experience

Synopsys inc

3 roles

Senior Engineer

Promoted

Feb 2025 – Present · 1 yr 4 mos

Application-Specific Integrated Circuits (ASIC)Debugging

ASIC DIGITAL DESIGN ENGINEER

Aug 2023 – Feb 2025 · 1 yr 6 mos

  • Serdes verification, DP protocol, multi protocol Phy verification
VerilogUniversal Verification Methodology (UVM)

Technical Intern

Jul 2022 – Aug 2023 · 1 yr 1 mo

AMBAAMBA AHB

Education

Motilal Nehru National Institute Of Technology

Master of Technology - MTech — Signal processing

Aug 2021 – Jul 2023

FEROZE GANDHI INSTITUTE OF ENGG AND TECHNOLOGY , RAEBARELI

Jun 2016 – Oct 2020

Stackforce found 100+ more professionals with Application-specific Integrated Circuits (asic) & Universal Verification Methodology (uvm)

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