Sai Yaswanth Divvela

Software Engineer

India7 yrs 11 mos experience
Highly Stable

Key Highlights

  • Senior Design Engineer with extensive ASIC design experience.
  • Strong background in IP development and VLSI technologies.
  • Proficient in multiple programming languages and design tools.
Stackforce AI infers this person is a semiconductor design engineer with expertise in ASIC and VLSI technologies.

Contact

LinkedIn

Skills

Core Skills

Ip Development

Other Skills

Standard CellTransistorsASIC circuit designASIC layout designShell ScriptingPhotographyVery-Large-Scale Integration (VLSI)Digital PhotographyCircuit DesignPython (Programming Language)CUnixLinuxMatlabVerilog

Experience

7 yrs 11 mos
Total Experience
3 yrs 6 mos
Average Tenure
10 mos
Current Experience

Arm

Senior Design Engineer

Aug 2025 – Present · 10 mos · Bengaluru, Karnataka, India

Synopsys inc

4 roles

R&D Staff Engineer

Promoted

Jan 2024 – Aug 2025 · 1 yr 7 mos

R&D Engineer II

Promoted

Apr 2022 – Jan 2024 · 1 yr 9 mos

R&D Engineer I

Jul 2020 – Apr 2022 · 1 yr 9 mos

Technical Intern

Jan 2020 – Jul 2020 · 6 mos

IP developmentStandard Cell

Photographic society bit mesra

Executive Member

Jan 2018 – Jan 2020 · 2 yrs · India

Education

Birla Institute of Technology, Mesra

Bachelor of Engineering — Electronics and Communications Engineering

Jan 2016 – Jan 2020

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