Richa Gupta

Director of Engineering

Pune, Maharashtra, India15 yrs 4 mos experience
Highly Stable

Key Highlights

  • 14 years of experience in VLSI domain.
  • Expert in PCIe and CXL security management.
  • Proven track record in Verification IP development.
Stackforce AI infers this person is a VLSI expert with a focus on PCIe and CXL technologies.

Contact

LinkedIn

Skills

Core Skills

PcieCxlIp Verification

Other Skills

Verification IP DevelopmentVerification PlanBug FixingCustomer SupportTest Case CreationBug ReportingFunctional CoveragePCIe SecurityCXL SecurityVHDLVerilogSystem VerilogAXI Bus protocolDebuggingModelSim

About

Design Verification engineer with 14 years of experience in VLSI domain. 12+ years of experience in VIP Development - Managing PCIe and CXL security team. Skills: PCIe, CXL, PCIe and CXL Security- SPDM, DOE, TDISP, TSP, IDE-KM, IDE, AXI, ACE protocols, UVM, System Verilog, Verilog

Experience

15 yrs 4 mos
Total Experience
6 yrs 3 mos
Average Tenure
4 yrs 5 mos
Current Experience

Siemens eda (siemens digital industries software)

2 roles

Senior Engineering Manager

Promoted

Jan 2025 – Present · 1 yr 5 mos

Lead Member Consulting Staff

Jan 2022 – Feb 2025 · 3 yrs 1 mo

Mentor graphics

Senior Member of Technical Staff

Jul 2013 – Sep 2023 · 10 yrs 2 mos · Noida, Uttar Pradesh, India

  • Working in PCIe Verification IP Development team.
  • Current Role:
  • Working independently on development of features of PCIe Verification IP.
  • Development of Verification Plan for testing of newly added features.
  • Fixing of bugs found in the VIP.
  • Supporting the customers.
  • Worked with AMBA Verfication IP Development Team
  • Past Role:
  • Development and maintenance of ACE, AXI, AXI4, APB3 VIPs
  • Supporting the customers using AMBA VIPs.
PCIeCXLVerification IP DevelopmentVerification PlanBug FixingCustomer Support

Hcl technologies

3 roles

Member of Technical Staff

Sep 2012 – Jun 2013 · 9 mos

  • Worked with IP Verification.
  • Role:
  • Creation of test cases for verifying customer's IP.
  • Reporting of bugs found in the design.
  • Coding functional coverage.
  • Achieiving 100% code and functional coverage.
Test Case CreationBug ReportingFunctional CoverageIP Verification

Software Engineer

Jun 2011 – Aug 2012 · 1 yr 2 mos

Academic Trainee

Jun 2010 – Dec 2010 · 6 mos

Education

YMCA Faridabad

Bachelor of Technology (BTech) — ECE

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