Arun Narayanan — Software Engineer
1. Expertise in working on ASIC Architecture Design, Functional Specification, Micro-Architecture, RTL Coding, SV assertions, Simulation, Debugging, Synthesis and Timing Analysis, Verilog, Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA). 2. Have worked on protocol like AMBA APB, AHB, AXI, UART and I2S. 3. Have hands-on experience with Low Power Interface Design, Access Protection and Q channel low power interface. 5. Have hands-on experience with EDA tools like Spyglass, VCspyglass, Verdi, Design Compiler, Timing Constraint Manager, coreTools.
Stackforce AI infers this person is a VLSI Design Engineer with strong expertise in ASIC development and low power design.
Location: Kerala, India
Experience: 3 yrs 11 mos
Skills
- Asic Architecture Design
- Rtl Coding
Career Highlights
- Expertise in ASIC Architecture and RTL Coding.
- Hands-on experience with leading EDA tools.
- Proficient in low power VLSI design techniques.
Work Experience
Synopsys Inc
ASIC Digital Design Sr. Engineer (2 yrs 4 mos)
ASIC Digital Design Engineer II (1 yr 7 mos)
Education
Master of Technology - MTech at National Institute of Technology, Tiruchirappalli
Bachelor of Technology - BTech at College of Engineering Trivandrum
Higher secondary at JNM GHSS Puthuppanam
SSLC at Maniyur panchayat GHSS
