Ankush Agarwal — Engineering Manager
Engineering leader with 15+ years of experience in FPGA prototyping, EDA systems, timing analysis, and scalable compilation flows across Synopsys, Siemens EDA, Atrenta, and Amdocs. Specialized in building high-performance infrastructure for large-scale SoC validation and hardware emulation workflows. Experienced in leading engineering teams, solving complex systems problems, optimizing runtime performance, and delivering customer-critical semiconductor tooling. Strong background in C/C++, FPGA workflows, debugging, timing analysis, and cross-functional collaboration in globally distributed environments.
Stackforce AI infers this person is a semiconductor engineering expert with a focus on FPGA prototyping and EDA systems.
Location: Bengaluru, Karnataka, India
Experience: 15 yrs 8 mos
Skills
- Fpga Prototyping
- Timing Analysis
Career Highlights
- 15+ years in FPGA prototyping and EDA systems.
- Expert in scalable compilation flows and SoC validation.
- Proven leadership in optimizing semiconductor tooling.
Work Experience
Synopsys Inc
Engineering Manager, R&D (2 yrs 4 mos)
Mgr II, R&D (1 yr 4 mos)
R&D staff Engineer (1 yr 1 mo)
Siemens EDA (Siemens Digital Industries Software)
Lead Member Of Technical Staff (5 yrs 5 mos)
Atrenta
Senior Software Engineer (2 yrs 9 mos)
Amdocs
Subject Matter Expert (2 yrs 9 mos)
Education
Bachelor of Engineering (B.E.) at Netaji Subhas Institute of Technology
at Sumeet Rahul Goel Memorial Sr. Sec. School