Wenjing Chen — DevOps Engineer
Hi, This is Wenjing. I am a Senior in Computer Engineering with a minor in Mathematics at Purdue University. I am strongly interested in hardware design and verification and looking forward to exploring more about this field.
Stackforce AI infers this person is a Hardware Design Engineer with expertise in ASIC and Physical Design.
Location: San Jose, California, United States
Experience: 3 yrs 8 mos
Skills
- Physical Design
- Static Timing Analysis
- Application-specific Integrated Circuits (asic)
- Research Skills
Career Highlights
- Strong background in hardware design and verification.
- Experience with Physical Design and Static Timing Analysis.
- Proficient in multiple programming languages including Python and Verilog.
Work Experience
Arteris
Senior Field Application Engineer (10 mos)
Synopsys Inc
Sr. Application Engineer (7 mos)
Application Engineer II (1 yr)
Purdue University Elmore Family School of Electrical and Computer Engineering
Teaching Assistant for ECE 33700: ASIC Design Lab (3 mos)
Teaching Assistant for ECE 27000: Digital Design System (4 mos)
Teaching Assistant for ECE 20001: Electrical Engineering Fundamentals (11 mos)
Synopsys Inc
Application Engineer Intern (3 mos)
The Data Mine - Purdue University
Undergraduate Data Science Researcher (4 mos)
FIRST Robotics Team 815
Mechanics Team Leader (1 yr 3 mos)
Education
Bachelor's degree at Purdue University
High School Diploma at Cabrini High School