Nishant Nitin Mishra

Product Engineer

Raigarh, Chhattisgarh, India3 yrs 11 mos experience

Key Highlights

Expertise in RTL design and UVM-based verification.
Hands-on experience with FPGA and digital circuit design.
Strong commitment to lifelong learning in semiconductor technology.

Stackforce AI infers this person is a Semiconductor Design Engineer with strong capabilities in VLSI and FPGA development.

Contact

Skills

Core Skills

Rtl DesignFpgaAndroid DevelopmentData Analysis

Other Skills

Field-Programmable Gate Arrays (FPGA)RTL VerificationVerilogVHDLXilinx VivadoJavaAndroid StudioObject-Oriented Programming (OOP)PythonData ScrapingData CleaningData VisualizationElectronics Hardware DesignHardware VerificationFPGA prototyping

About

"To leverage my expertise in digital electronics and semiconductor design and verification to contribute to innovative projects in the semiconductor industry. I aim to apply my technical skills in RTL design, UVM-based verification, and hardware architecture to improve the efficiency and reliability of cutting-edge semiconductor products. Committed to lifelong learning, I strive to stay current with advancements in ASIC/FPGA design while continuously honing my skills to drive technological progress and innovation within the industry."

Experience

3 yrs 11 mos

Total Experience

1 yr 5 mos

Average Tenure

1 yr 3 mos

Current Experience

Scaledge technology

2 roles

VLSI Design Verification Engineer

Mar 2025 – Present · 1 yr 3 mos · Bhubaneswar, Odisha, India · On-site

VLSI Design Verification Intern

Jul 2024 – Mar 2025 · 8 mos · Bhubaneswar, Odisha, India · On-site

Indian institute of technology (banaras hindu university), varanasi

FPGA Intern

Nov 2023 – Jan 2024 · 2 mos · Varanasi, Uttar Pradesh, India · On-site

Engineered a comprehensive system to capture keyboard inputs and display them on an LCD using a Basys3 FPGA board. The design, implemented in Verilog and simulated and tested with the Vivado Design Suite, integrated UART, SPI, and I2C protocols for seamless communication between the keyboard, LCD, and FPGA. The Basys3 FPGA board’s inbuilt 100MHz clock was strategically divided to a 1ms time period for simultaneous column checking in the keyboard. Additionally, a debouncing technique was employed to ensure accurate value capture from the keyboard. This project highlighted my ability to design and implement complex hardware interfaces,
manipulate clock frequencies, and apply advanced concepts like debouncing for enhanced system performance.
Utilized my expertise in Verilog and the Vivado Design Suite to engineer a digital clock on a Basys3 FPGA board. The project encompassed the creation of synthesizable Verilog code for the clock’s functionality, which was subsequently simulated and validated using Vivado’s extensive toolset. The final design was successfully deployed on the Basys3 FPGA board, showcasing my capacity to manage a hardware design project from ideation to physical realization. The Basys3 FPGA board’s inbuilt 100MHz clock was ingeniously divided to achieve a 1Hz frequency for a one-second counter and a 10ms period to optimize the perception of vision for LEDs. This project underscored my ability to manipulate clock frequencies effectively for desired outcomes.

Field-Programmable Gate Arrays (FPGA)RTL VerificationRTL DesignVerilogVHDLXilinx Vivado+1

Training and placement cell, nit mizoram

Training and Placement Coordinator

Aug 2023 – Jun 2024 · 10 mos · Aizawl, Mizoram, India · Hybrid

Eldaas technologies private limited

SDE Intern

Jun 2022 – Jul 2022 · 1 mo · Bengaluru, Karnataka, India · On-site

Android DevelopmentJavaAndroid StudioObject-Oriented Programming (OOP)

Microsoft

Microsoft Engage Mentee 2022

May 2022 – Jul 2022 · 2 mos · Bengaluru, Karnataka, India · Remote

Dare2compete

D2C Chief Igniter

Apr 2022 – Dec 2023 · 1 yr 8 mos · Aizawl, Mizoram, India

Pladex

Back End Developer and App Development Lead

Oct 2021 – Aug 2023 · 1 yr 10 mos · India

Backend Developer using MERN stack as well as Leading App Development.

Wallahabibi

Android Developer Intern

Oct 2021 – Dec 2021 · 2 mos · Noida, Uttar Pradesh, India

Handled MContri Application development & Integration of API.

The entrepreneurship network

Android Development-Associate

Sep 2021 – Dec 2021 · 3 mos · Delhi, India

Henry harvin

Analytic Intern

Jun 2021 – Sep 2021 · 3 mos · Noida, Uttar Pradesh, India

Data Scraping , Data cleaning and Model preparation(Regression,Time Series,ARIMA), Data Visualization.Used Python as the programming language and Power BI for presentation.
Project 1 : Sentiment Analysis
Project 2 : Competitive Analysis
Project 3 : Sales Forecasting
Project 4 : Employee Performance Analysis(Lead Team and also prepared report based on the project)

Civil guru ji

Android Developer

Jan 2021 – May 2021 · 4 mos · Bhilai, Chhattisgarh, India

This project is based on Object Oriented Programming Language (OOP)- JAVA which is developed by using the platform Android Studio.
This app not only calculate the quantity of materials required while doing civil work but also calculate the total budget required for doing that civil work.

PythonData ScrapingData CleaningData VisualizationData Analysis