Arthur Galachyan

Software Engineer

Armenia29 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Integrated Circuits and ASIC design.
  • Over a decade of experience in layout engineering.
  • Proven track record in debugging and electronics repair.
Stackforce AI infers this person is a semiconductor design expert with extensive experience in integrated circuit layout and debugging.

Contact

LinkedIn

Skills

Core Skills

Integrated Circuits (ic)Asic

Other Skills

DebuggingПолупроводниковые технологииИнтегральные схемыElectronics RepairСмешанный сигналIC layoutPhysical DesignConsumer ElectronicsSemiconductorsAnalog Circuit Design

Experience

29 yrs 8 mos
Total Experience
5 yrs 11 mos
Average Tenure
15 yrs 8 mos
Current Experience

Synopsys inc

4 roles

A&MS Layout Design Engineer, Sr. Staff

Feb 2024 – Present · 2 yrs 4 mos

AM&S Layout Design Engineer Staff

Promoted

Jan 2024 – Present · 2 yrs 5 mos

A&MS Layout Design Engineer Sr. II

Jan 2012 – Dec 2023 · 11 yrs 11 mos

Integrated Circuits (IC)DebuggingПолупроводниковые технологииASICИнтегральные схемыElectronics Repair+2

Manager I, R&D.

Sep 2010 – Jan 2012 · 1 yr 4 mos

Virage logic

Supervisor

Sep 2004 – Sep 2010 · 6 yrs

Leda design

Layout Engineer

Jan 2000 – Jan 2004 · 4 yrs

Armentel jsco., vimpelcom company

BSC/BTS engineer

Jan 1997 – Jan 2000 · 3 yrs

Ministry of communications of republic of armenia

Enginner

Jan 1996 – Jan 1997 · 1 yr

Education

SEUA - State Engineering University of Armenia (Ереванский Политехнический Институт - ЕрПИ)

Engineer's degree — Electronics

Jan 1987 – Jan 1992

Stackforce found 100+ more professionals with Integrated Circuits (ic) & Asic

Explore similar profiles based on matching skills and experience

Rajendra Prasad

Rajendra Prasad

R&D Engineering Director

at Synopsys Inc

Mountain View, United States27 yrs 2 mos exp
ManagementMachine LearningLeadershipCustomer EngagementPeople Management
Khullar, Navneet

Khullar, Navneet

Vice President of Engineering

at Synopsys Inc

Sunnyvale, United States27 yrs 10 mos exp
Srinath Jeevakumar

Srinath Jeevakumar

Senior Architect

at NVIDIA

Bengaluru, India6 yrs 8 mos exp
Performance VerificationSilicon Bring-upPerformance Analysis
Shripad Deshpande

Shripad Deshpande

Head of R&D - Hardware Design and EDA

at Chipforge.ai

India27 yrs 2 mos exp
EDASoCVirtual PrototypingASIPRTL design
Ashutosh Rao

Ashutosh Rao

R&D Engineer

at Synopsys Inc

Bengaluru, India4 yrs 4 mos exp
Static Timing AnalysisCircuit DesignHardware Security
Peter Wohl

Peter Wohl

Fellow

at Synopsys Inc

Williston, United States33 yrs 5 mos exp
ATPGCompressionDFT
Madhav Chikodikar

Madhav Chikodikar

Executive Director, R&D - FPGA software

at Synopsys Inc

Bengaluru, India32 yrs 2 mos exp
FPGASoftware Development
Ankush Borker

Ankush Borker

A&MS DESIGN ENGINEER

at Synopsys Inc

Delhi, India8 yrs 3 mos exp
Analog Circuit DesignSerDesLTE