Ahmed Shebaita, Ph.D.

CEO

San Francisco, California, United States18 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 15+ years in semiconductor technology and modeling.
  • Ph.D. in Electrical Engineering with patented innovations.
  • Influenced industry design practices across Tier-1 customers.
Stackforce AI infers this person is a Semiconductor Technologist with expertise in advanced modeling and timing analysis.

Contact

LinkedIn

Skills

Core Skills

Electrical EngineeringStatic Timing Analysis

Other Skills

Machine LearningFPGA prototypingRTL DesignTiming ClosureVLSI CADDeep LearningData AnalysisDebuggingVLSISoftware DevelopmentC++CLinuxVHDLPython

About

Semiconductor technologist with 15+ years of experience modeling and solving advanced technology challenges where traditional signoff assumptions break down. Ph.D. in Electrical Engineering with deep expertise in static timing analysis, waveform-aware modeling, variation-aware timing, and rail-aware effects in deep sub-micron nodes. Known for translating physical non-idealities—including IR drop, complex waveforms, statistical variation, and cross-coupled effects—into robust, signoff-accurate models and methodologies. Proven record of influencing industry-scale design practices through patented innovations, close SPICE correlation, and deployment across Tier-1 semiconductor customers.

Experience

18 yrs 3 mos
Total Experience
6 yrs 1 mo
Average Tenure
14 yrs 4 mos
Current Experience

Synopsys inc

Senior Researcher

Feb 2012 – Present · 14 yrs 4 mos · United States

  • Leadership Achievements
  • The founder of an initiative to bridge the gap between Industry and Academia.
  • Leading the program in US, Europe, Asia, and the middle east.
  • Added and teaching new graduate level courses.
  • Technical Achievements
  • Created a tool to check the Standard Cell Library quality.
  • Enhanced PrimeTime calculation accuracy with respect to SPICE in advanced technology nodes.
  • Expanded the PrimeTime capability to support multi-input-switching.
  • Create an advanced model to represent the electrical behavior of the timing model of a block
  • Enhance the modeling of multi-stage cells
  • Enhance the statistical model to account for the challenging statistical variation in advanced nodes technologies.
  • Enhance the runtime/accuracy tradeoff of PrimeTime
  • Enabled advanced modeling the aging effect
  • Enabled advanced modeling for actual silicon behavior
  • Enabled rail-aware timing analysis
Electrical EngineeringMachine LearningStatic Timing Analysis

Magma design automation

Senior Engineer

Jan 2010 – Feb 2012 · 2 yrs 1 mo · San Jose, California, United States

  • Worked on designing and developing a novel frequency domain model for highly accurate highly
  • efficient timing calculations.
  • Enhanced the frequency range of timing calculation
Electrical EngineeringStatic Timing Analysis

Ibm

Architect

Mar 2008 – Jan 2010 · 1 yr 10 mos · Cairo, Egypt

  • Worked as the technical focal point for the IBM-DS2 R&D collaboration program:
  • The collaboration was to help DS2 to deliver internet signals over power lines.
Electrical Engineering

Education

Northwestern University

Doctor of Philosophy (Ph.D.) — Electrical Engineering and Computer Science

Jan 2004 – Jan 2008

Cairo University

Master of Engineering — Electrical and Electronics Engineering

Jun 2000 – Sep 2003

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