Sandeep Prabhakaran — Product Engineer
An VLSI Design & Verification Engineer with hands-on experience and profound knowledge in RTL Coding using Synthesizable constructs of Verilog, FSM based design, Simulation, CMOS Digital VLSI Design , Code Coverage, Functional Coverage, Synthesis, Static Timing Analysis, Assertion Based Verification using System Verilog Assertions & UVM, as my core skills. I am also Familiar with Linux, Perl-Scripting, basic programming languages with excellent understanding of OOP concept
Stackforce AI infers this person is a VLSI Design and Verification Engineer with expertise in digital hardware design.
Location: Sunnyvale, California, United States
Experience: 2 yrs
Skills
- Verification And Validation (v&v)
- Uvm
Career Highlights
- Expert in VLSI Design and Verification methodologies.
- Proficient in RTL Coding and System Verilog Assertions.
- Strong academic background with a 3.92 GPA in MS.
Work Experience
NVIDIA
Verification Engineer (2 yrs)
Synopsys Inc
Design Verification Intern (11 mos)
Education
Master of Science - MS at Portland State University
Bachelor's degree at Sathyabama Institute of Science & Technology, Chennai
