ANSHUMAN YADAV

Software Engineer

Lucknow, Uttar Pradesh, India1 yr 4 mos experience

Key Highlights

  • Experienced in ASIC Digital Design and Verification.
  • Proficient in SystemVerilog and Formal Verification techniques.
  • Strong foundation in Electronic Circuit Design and Analysis.
Stackforce AI infers this person is a Digital Design Engineer with expertise in ASIC and verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Electronic System DesignDigital Circuit DesignFormal Verification

Other Skills

Systemverilog AssertionsElectronic Circuit DesignStatic Timing AnalysisAnalog Circuit DesignC++C (Programming Language)Universal Verification Methodology (UVM)SystemVerilogVerilogCMOSTeamworkProblem SolvingHardware

Experience

1 yr 4 mos
Total Experience
1 yr 4 mos
Average Tenure
1 yr 4 mos
Current Experience

Synopsys inc

ASIC Digital Design senior Engineer

Feb 2025 – Present · 1 yr 4 mos · India · On-site

Systemverilog AssertionsFormal VerificationElectronic System DesignElectronic Circuit DesignDigital Circuit DesignStatic Timing Analysis+10

Cadence design systems

Internship Trainee

Mar 2024 – Jan 2025 · 10 mos · Bengaluru, Karnataka, India

Formal VerificationSystemverilog Assertions

Education

National Institute of Technology Rourkela

Master of Technology - MTech — Communication and Networks

Aug 2021 – May 2023

Madan Mohan Malaviya University of Technology

Bachelor of Technology - BTech — ELECTRONICS AND COMMUNICATION

Jan 2015 – Jan 2019

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