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Akshata Babu .

Product Engineer

Richardson, Texas, United States4 yrs 8 mos experience

Key Highlights

  • Expert in Analog and Mixed-Signal EDA tools.
  • Proven track record in customer engagement and technical evaluations.
  • Strong background in semiconductor design methodologies.
Stackforce AI infers this person is a Semiconductor EDA expert with a focus on Analog and Mixed-Signal design.

Contact

Skills

Core Skills

EdaAnalog And Mixed-signal DesignPhysical Verification

Other Skills

Synopsys Custom CompilerPrimeWave Design EnvironmentIC ValidatorStarRCPrimeSimPythonTCLICVWBCustom CompilerVerilogVHDLC programmingC++HSPICEMATLAB

About

As a Senior Applications Engineer at Synopsys, I’m passionate about empowering customers to design and deliver high-performance analog and mixed-signal solutions using advanced EDA tools and methodologies. I work as part of the Analog and Mixed-Signal (AMS) team, supporting customers across the entire design flow from Front-End activities like schematic entry, simulation, and analysis to Back-End processes including layout entry, physical verification, parasitic extraction, and signoff. I provide technical expertise across key Synopsys solutions such as Custom Compiler, PrimeWave Design Environment, IC Validator, StarRC and PrimeSim simulation engines. Beyond technical support, I collaborate with sales and business teams to lead technical evaluations, benchmarks, methodology presentations and product demonstrations, driving successful customer engagements and adoption of Synopsys technologies. I’m driven by solving complex design challenges, streamlining workflows, and contributing to innovations that shape the future of semiconductor design. Technical Skills: Programming/Scripting languages: Verilog, VHDL, TCL, C programming, C++, Python, HSPICE, MATLAB Tools & Platforms: Synopsys Custom Compiler, PrimeWave design Environment, StarRC, Library Compiler, Synopsys Design Vision, Synopsys ICC2, IC Validator, VUE, ICWBEV, ICVWB, Calibre (DRC/LVS), Synopsys Silicon smart, Primetime, Cadence Virtuoso, Ansys HFSS, AWR Microwave Office, AEEE Pro, NI Multisim. Simulation Packages: Primesim Spice, Hspice , Xa , Pro, ModelSim, Xilinx ISE, MATLAB, HFSS Technology node : TSMC 5nm, 7nm, 12nm, 130nm, 180nm, Intel 18A, GF 22nm, 55nm, 65nm, XFAB XO035, XH035, XC06, XP018, HHGRACE 110nm, DBH 130nm. Office Tools: MS Office.

Experience

4 yrs 8 mos
Total Experience
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Average Tenure
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Current Experience

Siemens eda (siemens digital industries software)

Field Application Engineer lll

Apr 2026Present · 2 mos · Santa Clara, California, United States

Synopsys inc

2 roles

Applications Engineer, Sr

Jan 2022Mar 2026 · 4 yrs 2 mos · United States · On-site

  • As part of Analog and Mixed-Signal team, collaborated closely with customers during technical evaluation, which let to successful tool adoption.
  • Work closely with sales to lead technical evaluation/benchmarks, methodology presentations, product pitches and demos to win engagements with Synopsys solutions and worked closely with R&D department to optimize product strategies and accelerate go-to-market timelines.
  • Qualified Synopsys Custom Compiler tools feature by working reference flows on Intel nodes.
  • Provided technical solutions/ tool support, enabling methodology flows to Synopsys customers like Intel, Ericsson, Tokyo Electron, Atlas Magnetics, TT Electronics, IC Enable, RF Micron, ACL Digital, Nova Semiconductors, PDF solutions, SwitchSemi and Rain AI.
  • Solid hands-on experience with tools like Synopsys Custom Compiler, PrimeWave Design Environment, IC Validator, StarRC, PrimeSim
Synopsys Custom CompilerPrimeWave Design EnvironmentIC ValidatorStarRCPrimeSimEDA+1

Technical Intern

May 2021Nov 2021 · 6 mos · United States

  • Worked as part of Custom Design and Physical Verification group.
  • I was responsible for building Applications, identifying and repairing LVS shorts using short finder feature from IC Validator VUE on layout editors such as ICVWB, ICC2 and Custom Compiler.
PythonTCL

Ansys

Electronics Simulation R&D Intern

Jan 2021Apr 2021 · 3 mos · Pennsylvania, United States

  • Developed Test cases to verify resolved defects in HFSS AEDT 2021 R2
  • Simulated and tabulated the HFSS features - Enhanced Low Frequency with Improve Mesh Quality and Solver Slider Bar for multiple projects. Compared time and memory parameters for projects with and without an Environment in HFSS R21.1
  • Plotted S parameter graphs for the respective projects

Bosch engineering and business solutions

Associate Engineer

Aug 2019Dec 2019 · 4 mos · Bengaluru, Karnataka, India

  • Designed, developed and implemented the Bootloader application (Bootloader version ABS ECU) layer and Unified Diagnostic Services as per the customer specific requirement. And ISO 14229
  • Integrated AutoSar (version 4.2) basic software components such as memory stack, communication stack and system stack
  • Established the communication between Tester and ECU using CAN Protocol
  • Verified Bootloader Software with Power Interruption Test and Communication Interruption Test
  • Performed testing using VTESTER and VFLASH Scripts

Beml ltd.

Intern

Jul 2018Jul 2018 · 0 mo · Bengaluru, Karnataka, India

  • Learnt about working of different types of welding, drilling and welding machines.
  • Learnt the functioning of Plasma cutting

Education

The University of Texas at Dallas

Master's degree — Electrical and Electronics Engineering

Jan 2020Jan 2021

Dayananda Sagar Institutions

Bachelor of Engineering — Electronics and Communications Engineering

Jan 2015Jan 2019

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