Alan V. — Software Engineer
Master's degree in Electrical Engineering with specialization in VLSI at University of Southern California, Los Angeles Applications: Qt Creator, Microsemi Libero, Cadence Virtuoso, NCsim, ModelSim, Synopsys DC and DFT compliers, Proteus, SimScalar, HSpice Languages: C, C++, Qt, Java, Perl, Verilog, System Verilog, System Verilog CSP, TCL, Assembly Language Environments: Windows (All), Linux/Unix, Macintosh Hardware: Cache, Pipelining, Virtual Memory, Cache coherency protocols Tools: Libero SoC, Cadence SoC Encounter, Cadence Conformal LEC, Synopsys PrimeTime, Synopsys Tetramax
Stackforce AI infers this person is a VLSI and EDA expert with a strong background in software development.
Location: Bengaluru, Karnataka, India
Experience: 11 yrs 7 mos
Career Highlights
- Master's degree in Electrical Engineering with VLSI specialization.
- Extensive experience with leading EDA tools and methodologies.
- Strong programming skills in multiple languages including C and Verilog.
Work Experience
Synopsys Inc
R&D Engineer, Sr 2 (5 yrs 7 mos)
R&D Enginner, Sr 1 (7 yrs 7 mos)
R&D Engineer 2 (9 yrs 8 mos)
Microsemi Corporation
Engineer 2 (2 mos)
Engineer 1 (1 yr 7 mos)
Engineering Intern (4 mos)
Education
Master of Science at University of Southern California
Bachelor of Engineering at Don Bosco Institute of Technology (University of Mumbai