A

ANKIT KUMAR

Product Engineer

Bengaluru, Karnataka, India2 yrs 11 mos experience

Key Highlights

  • 3 years of hands-on experience in ASIC verification.
  • Proficient in SystemVerilog, UVM, and VCS.
  • Strong analytical and problem-solving skills.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC design and verification methodologies.

Contact

Skills

Core Skills

Functional VerificationSystemverilogPhysical DesignAutomation

Other Skills

System ArchitectureLogic GatesPython (Programming Language)Universal Verification Methodology (UVM)LinuxVcsC (Programming Language)DebuggingDigital Circuit DesignVerilogEnglishEngineeringProblem Solving

About

I am passionate about VLSI and open to working on things that make me curious and excited to learn. Experienced ASIC PHY IP Verification Engineer with around 3 years of hands-on experience in verifying complex semiconductor designs. Proficient in all aspects of verification methodologies, including test planning, testbench development, functional verification, and debugging. Skilled in using industry-standard verification languages and tools such as SystemVerilog, UVM, and VCS. Demonstrated ability to collaborate effectively with cross-functional teams to deliver high-quality ASIC designs on schedule. Strong analytical and problem-solving skills. Seeking to leverage expertise in ASIC verification to contribute to innovative semiconductor projects.

Experience

2 yrs 11 mos
Total Experience
--
Average Tenure
--
Current Experience

Synopsys inc

ASIC Digital Design Engineer

Jul 2023Present · 2 yrs 11 mos · Bengaluru, Karnataka, India · On-site

  • Currently working on MRDIMM MRPhy IP verification . I have been handling HWT component verification including testbench , testplanning and regressions.
System ArchitectureLogic GatesFunctional VerificationSystemVerilog

Nxp semiconductors

Physical Design Intern

Jan 2023Jun 2023 · 5 mos · Bengaluru, Karnataka, India

  • During my intership , I got to work on IMX95 project where I learned Physical Design and implemented from Synthesis, Placement to Routing stage as a part of P& R Team. Along with that I worked on Automation project where I applied python library to generate the Excel sheet which contain information of different and important parameters results automatically. For example : Timing Scenarios, density etc.
Logic GatesPython (Programming Language)Physical DesignAutomation

Iete students' chapter bit mesra

Technical subteam member

Oct 2019Oct 2022 · 3 yrs · Jharkhand, India

Education

Birla Institute of Technology, Mesra

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jun 2019Jan 2023

Jawahar vidya mandir shyamali ranchi

12th board — PCM(physics+chemistry+maths)

Jan 2016Jan 2018

Adwaita Mission High School

10th Board

Jun 2016Present

Stackforce found 100+ more professionals with Functional Verification & Systemverilog

Explore similar profiles based on matching skills and experience