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Daniel Quach

Software Engineer

Ho Chi Minh City, Vietnam4 yrs 8 mos experience

Key Highlights

  • Over 4 years of experience in semiconductor IC design.
  • Expertise in physical design for advanced technology nodes.
  • Proficient in automation and scripting for efficiency.
Stackforce AI infers this person is a Semiconductor Physical Design Engineer with expertise in automation and advanced design methodologies.

Contact

Skills

Core Skills

Physical DesignTest Automation

Other Skills

Physical VerificationScriptingFusion CompilerICC2Python (Programming Language)Jira ConfluenceGitCadence InnovusSynopsys Fusion CompilerPower IntegrityLinux ServerJenkinsFloorplanningPlace & RoutePNR

About

Major field: IC Design Experience: +4 years in semiconductor. Role: SoC Physical Design (BE) For more detailed, please contact: + Email: qdatbinh@gmail.com + Phone: (+84)36 4712 711

Experience

4 yrs 8 mos
Total Experience
--
Average Tenure
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Current Experience

Guc

2 roles

Advanced Engineer

Oct 2025Present · 8 mos · Ho Chi Minh City, Vietnam · On-site

Physical Design Engineer

Jul 2024Sep 2025 · 1 yr 2 mos · Ho Chi Minh City, Vietnam · On-site

  • 5nm in-house APR Innovus flow with IP/ Block implementation:
  • + PnR, DRC/LVS, timing closure.
  • + Top/ sub-block interface timing.
  • + Power Integrity analysis and fixing.
Physical DesignPhysical Verification

Synopsys inc

SoC Engineer

May 2022Jun 2024 · 2 yrs 1 mo · District 7, Ho Chi Minh City, Vietnam · On-site

  • SoC Physical Design (BE)
  • + Having experiences on 3nm, 5nm TSMC process and 4nm SAMSUNG process
  • + RM/MUSE Flow with Fusion Compiler/ ICC2: PnR from RTL to GDS.
  • + Work with full flow PnR to tapeout stage, Sign-off fixing (EM/IR, DRC/LVS), Timing closure
  • + Good scripting (write utility, script by tclsh, C shell) to improve workload also smarter work.
Physical DesignPhysical VerificationScriptingFusion CompilerICC2

Tma solutions

Quality Assurance Engineer

Jul 2021Apr 2022 · 9 mos · Phu Nhuan, Ho Chi Minh City, Vietnam · On-site

  • Work with Canadian team for manual/ auto test networking device.
  • Create test case, test scenario for covering and detect bug, issue in the new feature released from DEV team.
  • Have experienced with Jira Confluence, Git
Test AutomationPython (Programming Language)Jira ConfluenceGit

Can tho university

Printed Circuit Board Designer

Jan 2020Mar 2021 · 1 yr 2 mos · Can Tho, Vietnam

  • Hardware design: Design schematic, Layout PCB, make samples, perform testing with embedded systems according to customer requirements.

Education

Can Tho University

Bachelor of Engineering - BE

Sep 2017Sep 2021

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